基于源极隔离技术的集成电路敏感面积分析
发布时间：2018-12-19 19:01
【摘要】：航天技术是当今世界竞争最激烈、发展最迅速的领域之一,并代表着国家科技实力和综合国力。随着航天技术的飞速发展,电子设备在航天器中的应用越来越普遍。因此,处于空间辐射环境中的电子设备在辐射作用下,元器件会发生单粒子效应,以至于电子设备不能正常工作。空间辐射对半导体材料及器件的影响最为强烈,而且随着工艺尺寸的缩减,半导体器件对单粒子效应的敏感度增加,新的加固技术的研究势在必行。单粒子效应最基本的加固方法就是抑制敏感节点对电荷的收集量。PMOS管的电荷收集机理包括载流子的漂移运动、扩散运动和寄生双极效应。其中PMOS管的寄生双击效应对敏感节点的电荷收集起主要作用。有效的加固技术可以考虑抑制寄生双极效应,从而减少敏感节点对电荷的收集量。有学者提出了源极隔离加固技术,源极隔离加固技术能够有效抑制寄生双极效应。本文首先将标准单元敏感面积作为评价指标,分析了源极隔离技术的加固效果;其次研究了源极隔离技术的性能开销;然后研究了工艺尺寸缩减对源极隔离加固效果的影响;最后研究了源极隔离加固技术在SRAM单元中的应用。取得的主要成果如下:1)基于180nm体硅双阱工艺,以标准单元的敏感面积和SET脉冲宽度为评价指标,研究了源极隔离技术的加固效果。三维混合模拟结果显示,采用源极隔离技术后,标准单元的敏感面积显著减小。2)分别以标准单元的敏感面积和SET脉冲宽度为评价指标,研究了源极隔离加固效果随工艺缩减的变化。三维混合模拟结果表明,当工艺尺寸从180nm缩减到65nm时,源极隔离技术的加固效果会逐渐减弱,这主要归因于源极隔离版图结构中寄生双极晶体管的电流增益随着工艺尺寸的缩减而增加。三维模拟结果还显示源极隔离版图结构中SET脉冲宽度随着N-Well接触距离的增加而增加,随着N-Well接触面积的增加而减小,随着温度的升高而变宽。通过适当增加N-Well接触面积可以增强源极隔离技术的加固效果。3)研究了源极隔离加固技术在SRAM单元中的应用。三维混合模拟结果表明,采用源极隔离技术后,SRAM单元的敏感面积有一定程度的减小。
[Abstract]:Aerospace technology is one of the most competitive and rapidly developing fields in the world, and represents the national scientific and technological strength and comprehensive national strength. With the rapid development of space technology, the application of electronic equipment in spacecraft is becoming more and more common. Therefore, the electronic devices in the space radiation environment will have a single particle effect under the radiation, so that the electronic devices can not work properly. The influence of space radiation on semiconductor materials and devices is most intense, and with the reduction of process size, the sensitivity of semiconductor devices to single particle effect increases, so it is imperative to study new reinforcement technology. The most basic method of single particle effect is to suppress the charge collection at sensitive nodes. The charge collection mechanism of PMOS tube includes the drift motion of carrier diffusion motion and parasitic bipolar effect. The parasitic double-click effect of PMOS tube plays an important role in charge collection of sensitive nodes. The effective reinforcement technique can reduce the charge collection by reducing the parasitic bipolar effect. Some scholars have proposed the source pole isolation reinforcement technology, which can effectively suppress parasitic bipolar effect. In this paper, the sensitive area of the standard element is taken as the evaluation index, and the reinforcement effect of the source pole isolation technology is analyzed, then the performance cost of the source pole isolation technology is studied, and the effect of the process size reduction on the source pole isolation reinforcement effect is studied. Finally, the application of pole isolation reinforcement technology in SRAM element is studied. The main results are as follows: 1) based on the 180nm bulk silicon double well technology, the reinforcement effect of the source pole isolation technique is studied with the sensitive area of the standard cell and the width of the SET pulse as the evaluation index. The results of 3D hybrid simulation show that the sensitive area of the standard cell is significantly reduced by using the source pole isolation technique. 2) the sensitive area of the standard cell and the width of the SET pulse are taken as the evaluation indexes, respectively. The effect of pole isolation and reinforcement is studied. The results of 3D mixing simulation show that when the process size is reduced from 180nm to 65nm, the reinforcement effect of the source pole isolation technique will gradually weaken. This is mainly due to the increase of the current gain of parasitic bipolar transistors in the source isolated layout with the decrease of process size. The 3D simulation results also show that the width of SET pulse increases with the increase of N-Well contact distance, decreases with the increase of N-Well contact area, and widens with the increase of temperature. The reinforcement effect of source pole isolation technology can be enhanced by increasing N-Well contact area properly. 3) the application of source pole isolation reinforcement technology in SRAM element is studied. The results of 3D hybrid simulation show that the sensitive area of SRAM element decreases to a certain extent after the use of source pole isolation technology.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：V443;TP333
，
本文编号：2387318
[Abstract]:Aerospace technology is one of the most competitive and rapidly developing fields in the world, and represents the national scientific and technological strength and comprehensive national strength. With the rapid development of space technology, the application of electronic equipment in spacecraft is becoming more and more common. Therefore, the electronic devices in the space radiation environment will have a single particle effect under the radiation, so that the electronic devices can not work properly. The influence of space radiation on semiconductor materials and devices is most intense, and with the reduction of process size, the sensitivity of semiconductor devices to single particle effect increases, so it is imperative to study new reinforcement technology. The most basic method of single particle effect is to suppress the charge collection at sensitive nodes. The charge collection mechanism of PMOS tube includes the drift motion of carrier diffusion motion and parasitic bipolar effect. The parasitic double-click effect of PMOS tube plays an important role in charge collection of sensitive nodes. The effective reinforcement technique can reduce the charge collection by reducing the parasitic bipolar effect. Some scholars have proposed the source pole isolation reinforcement technology, which can effectively suppress parasitic bipolar effect. In this paper, the sensitive area of the standard element is taken as the evaluation index, and the reinforcement effect of the source pole isolation technology is analyzed, then the performance cost of the source pole isolation technology is studied, and the effect of the process size reduction on the source pole isolation reinforcement effect is studied. Finally, the application of pole isolation reinforcement technology in SRAM element is studied. The main results are as follows: 1) based on the 180nm bulk silicon double well technology, the reinforcement effect of the source pole isolation technique is studied with the sensitive area of the standard cell and the width of the SET pulse as the evaluation index. The results of 3D hybrid simulation show that the sensitive area of the standard cell is significantly reduced by using the source pole isolation technique. 2) the sensitive area of the standard cell and the width of the SET pulse are taken as the evaluation indexes, respectively. The effect of pole isolation and reinforcement is studied. The results of 3D mixing simulation show that when the process size is reduced from 180nm to 65nm, the reinforcement effect of the source pole isolation technique will gradually weaken. This is mainly due to the increase of the current gain of parasitic bipolar transistors in the source isolated layout with the decrease of process size. The 3D simulation results also show that the width of SET pulse increases with the increase of N-Well contact distance, decreases with the increase of N-Well contact area, and widens with the increase of temperature. The reinforcement effect of source pole isolation technology can be enhanced by increasing N-Well contact area properly. 3) the application of source pole isolation reinforcement technology in SRAM element is studied. The results of 3D hybrid simulation show that the sensitive area of SRAM element decreases to a certain extent after the use of source pole isolation technology.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：V443;TP333
，
本文编号：2387318
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