可重构计算体系结构及应用研究

发布时间：2019-03-11 17:06

【摘要】：可重构计算可以针对具体问题，更改自身的硬件配置结构，，使其能够保持软件计算的灵活性特点，又能拥有硬件计算的高性能特点，所以其受到研究人员的广泛重视，成为高性能计算领域的研究热点之一。整个可重构计算的研究内容可以分为两个层次，即可重构计算应用的研究及可重构计算硬件平台的研究。应用研究层次，可以把研究问题归类为特定应用、通用应用两类。特定应用需要对针对特定问题对计算模型、数据组织、通信模型、算法实现做出优化，使应用的性能最大化。而通用应用则是希望对一类问题提出泛型模板及构建应用库，当遇到属于同一类型的应用时可以通过修改开放接口，利用可重构计算的硬件可配置特性，得到具体问题的高效解决方案。硬件平台研究层次，基本可分为细粒度可重构计算平台研究及粗粒度可重构计算平台研究两类。细粒度可重构平台的研究主要指FPGA芯片的研究。FPGA芯片是当今最成熟的可重构计算基础硬件。但由于其有配置时间长、能耗大、布局布线时间长、资源利用率低及数据传输时延大等缺点，越来越多的研究将重点转移到粗粒度可重构计算平台研究。本文的研究内容完整包括了可重构计算研究两个层次：从应用研究入手，深入到硬件结构研究。同时我们的研究可以划分为三个个方面：特定应用研究、通用应用研究、及新型可重构硬件平台研究。特定应用研究方面，我们选取在视频监视、安全接触控制等领域有广泛应用前景的人脸检测为例，通过改进图像缩放阈值及缩放算法的选取、积分图计算流水线结构，使其适应可重构硬件FPGA的基础结构。实验结果也表明基于FPGA的解决方案性能远远高于传统的软件解决方案。通用应用研究方面，我们选取在数字逻辑问题、人工智能等方面有重要地位且前人研究没有解决的递归问题为对象，通过划分递归查找树、平衡递归任务划分方法构造了递归问题的通用、并行可重构硬件并行解决方案。新型可重构硬件体系结构研究方面，针对现有粗、细粒度可重构硬件的具体缺点，我们提出基于新型的无线互联机制、异构的基础功能单元、高效的任务调度优化机制的异构可重构平台。真实实验的对比表明在能耗、性能、配置生成时间上与先前的可重构计算平台相比，我们的异构平台有很大的优势。
[Abstract]:Reconfigurable computing can change its hardware configuration structure so that it can maintain the flexibility of software computing and have the high performance characteristics of hardware computing, so it has been widely paid attention to by researchers, and reconfigurable computing can change its own hardware configuration structure in order to maintain the flexibility of software computing and high performance characteristics of hardware computing. It has become one of the research hotspots in the field of high performance computing. The whole research content of reconfigurable computing can be divided into two levels: the research of reconfigurable computing application and the research of reconfigurable computing hardware platform. At the application research level, the research problems can be classified into two categories: specific application and general application. Specific applications need to optimize the computing model, data organization, communication model and algorithm implementation to maximize the performance of the application. General-purpose applications hope to propose generic templates and build application libraries for a class of problems. When they encounter applications of the same type, they can make use of the hardware configurable characteristics of reconfigurable computing by modifying the open interface. Get efficient solutions to specific problems. The research level of hardware platform can be divided into two categories: fine-grained reconfigurable computing platform and coarse-grained reconfigurable computing platform. The research of fine-grained reconfigurable platform mainly refers to the research of FPGA chip, which is the most mature basic hardware of reconfigurable computing. However, due to its shortcomings such as long configuration time, large energy consumption, long layout and routing time, low resource utilization and large data transmission delay, more and more research focuses on coarse-grained reconfigurable computing platforms. The research contents of this paper include two levels of reconfigurable computing: from the research of application, to the research of hardware architecture. At the same time, our research can be divided into three aspects: specific application research, general application research, and new reconfigurable hardware platform research. In the aspect of specific application research, we choose face detection which is widely used in video surveillance, safe contact control and other fields as an example. By improving the image scaling threshold and the selection of scaling algorithm, we calculate the pipeline structure of integral graph. Adapt it to the infrastructure of reconfigurable hardware FPGA. The experimental results also show that the performance of FPGA-based solutions is much higher than that of traditional software solutions. In the field of general application research, we choose recursive problem which has important position in digital logic problem, artificial intelligence and so on, and has not been solved by predecessors, by dividing recursive search tree, The balanced recursive task partition method constructs a general and parallel reconfigurable hardware parallel solution for recursive problems. In the aspect of research on the new reconfigurable hardware architecture, we propose a new wireless interconnection mechanism, which is based on heterogeneous basic functional units, aiming at the specific shortcomings of the existing coarse and fine-grained reconfigurable hardware. An efficient heterogeneous reconfigurable platform for task scheduling optimization. The comparison of real experiments shows that our heterogeneous platform has great advantages over previous reconfigurable computing platforms in terms of energy consumption, performance and configuration generation time.
【学位授予单位】：上海交通大学
【学位级别】：博士
【学位授予年份】：2013
【分类号】：TP38

【共引文献】