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初等函数运算器的设计研究

发布时间:2019-04-18 06:46
【摘要】:随着集成电路的迅速发展,人们对于处理器的性能要求也越来越高,尤其在数值计算方面,既要求能够保证足够的速度和精度,又希望能有效的控制硬件面积和功耗。浮点数据的计算已经成为大多数处理器的基本要求,除了需要完成简单的浮点加法、减法和乘法运算以外,还要求能够完成一些初等函数运算,例如倒数、平方根、平方根倒数、指数、对数等等。 本文主要研究的是在单精度浮点数领域的初等函数运算器低成本设计,比较适用于移动设备中。通过对初等函数实现方法的研究,基于查找表的分段多项式逼近方法是目前单精度初等函数逼近最理想的方法,它不但在查找表面积与计算速度两方面做了很好的平衡,而且能够实现绝大多数的初等函数运算。 本文利用相邻区间参数约束的理论,在不造成过大误差的前提下,有效地减少了多项式逼近中所需要存储的参数数量,并且通过MILP(混合整型规划)问题优化误差。在二次多项式运算部分,利用乘法分配率进行形式变换,将一次平方运算、两次乘法运算和三次加法运算转化为两次乘加运算,并通过复用乘加结构完成运算。对于华莱士树进行截断处理,有效减少了硬件逻辑。结果证明总的运算部分的面积能够减少40%,包括查找表和多项式计算两部分。同时针对浮点格式数据,本文还加入了预处理和后处理模块,整个设计在SMIC0.18um工艺下进行综合,时钟频率可以达到300MHz,而面积为0.22mm2。
[Abstract]:With the rapid development of integrated circuits, the performance requirements of processors become higher and higher, especially in numerical computation, not only to ensure sufficient speed and accuracy, but also to control the hardware area and power consumption effectively. Floating-point data calculation has become the basic requirement of most processors, in addition to the need to complete simple floating-point addition, subtraction and multiplication, but also to be able to complete some elementary function operations, such as reciprocal, square root, Square-root reciprocal, exponent, logarithm, etc. This paper focuses on the low-cost design of elementary function operators in the field of single-precision floating-point numbers, which is more suitable for mobile devices. Through the research on the realization method of elementary function, the piecewise polynomial approximation method based on look-up table is the most ideal method for single-precision elementary function approximation at present. It not only makes a good balance between the search surface area and the calculation speed, but also has a good balance between the searching surface area and the computing speed. And can realize the vast majority of elementary function operation. In this paper, the theory of parameter constraints in adjacent interval is used to reduce effectively the number of parameters stored in polynomial approximation without causing too much error, and the optimization error of MILP (mixed integral programming) problem is adopted. In the second order polynomial operation part, the multiplicative distribution rate is used to carry on the formal transformation, the first square operation, the two times multiplication operation and the three times addition operation are transformed into the two times multiplication and addition operation, and the operation is completed by the multiplex multiplication and addition structure. The hardware logic is effectively reduced by truncating the Wallace tree. The results show that the total area of the operation can be reduced by 40%, including lookup table and polynomial calculation. At the same time, the pre-processing and post-processing modules are added to the floating-point format data. The whole design is synthesized in SMIC0.18um process. The clock frequency can reach 300 MHz and the area is 0.22 Mm2.
【学位授予单位】:浙江大学
【学位级别】:硕士
【学位授予年份】:2013
【分类号】:TP332.2

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