基于FPGA的数据高速非易失存储技术研究

发布时间：2019-04-27 03:02

【摘要】：现代战争中，毁伤效果评估作为一项重要作战任务，对战局判断、战略决策都起着决定性作用。通过图像反映毁伤效果最为直观的，尽可能的获取大视场角和高分辨率的高质量图像是一项重要的侦查任务。随着成像技术的飞速发展，成像分辨率越来越高，帧频越来越快，通过无线方式，难以实现对大量试验数据的全部收回。因此侦查系统通常采用用高速大容量非易失存储器保存高速实时图像数据或雷达信号，再回读数据至计算机进行数据分析。特别是在比较恶劣的条件下，实现高清图像也就是高速大容量的图像数据存储，，对存储设备的性能要求就更高。一是存储速率高，存储速度务必满足数据采样的传输速率；二是存储容量大，高速数据采集必然会产生大量的数据流；三是数据存储器件的可靠性高。存储设备除了在恶劣的环境下能工作外，还要保证存储数据的正确性。此外，存储器的结构尺寸、抗冲击性能、功耗等也是重要的考虑因素。因此开发出体积小、抗大量级冲击和温度冲击、功耗低、重量轻、成本低廉的大容量固态存储系统在无线侦查设备中有着非常重要的作用。本文介绍了在有限的尺寸空间内，实现高速率大容量数据存储的硬件结构框架和系统实现方案。本设计采用了一片FPGA作为核心控制器，同时控制两片NANDFLASH芯片的硬件结构，根据flash芯片的双CE特性和页编程的特点，引入了乒乓流水的控制技术，实现了数据的实时高速存储。同时还建立了坏块列表信息，屏蔽了flash芯片的坏块地址，确保存储系统的稳定工作。在数据回读时，利用单独板卡读卡器最为通信桥梁，将存储卡的数据回读至计算机。本文还介绍了读卡器的硬件工作机制，坏块管理软件、转换图像软件以及读卡器应用软件的设计方法，最后对本系统进行了总结和展望。
[Abstract]:In modern war, damage effect evaluation, as an important combat task, plays a decisive role in decision-making and strategic decision-making of war situation. It is an important task to obtain high-resolution and large field-of-view images as far as possible because it is the most direct-viewing image to reflect the damage effect. With the rapid development of imaging technology, the resolution of imaging is getting higher and higher, and the frame rate is getting faster and faster. It is difficult to recover a large amount of experimental data by wireless mode. Therefore, the detection system usually uses high-speed and large-capacity non-volatile memory to store high-speed real-time image data or radar signal, and then read back the data to the computer for data analysis. Especially in the worse conditions, the high-speed and large-capacity storage of high-definition images requires higher performance of storage devices. First, the storage rate is high, the storage speed must meet the transmission rate of data sampling; the second is the large storage capacity, high-speed data acquisition will inevitably produce a large number of data streams; third, the reliability of data storage devices is high. Storage devices can not only work in harsh environment, but also ensure the correctness of stored data. In addition, memory structure size, impact resistance, power consumption and so on are also important considerations. Therefore, it is very important to develop a large-capacity solid-state storage system with small size, high-order shock and temperature shock, low power consumption, light weight and low cost in wireless detection equipment. In this paper, the hardware architecture and system implementation scheme of high-speed and large-capacity data storage in limited size space are introduced. In this design, a piece of FPGA is used as the core controller and the hardware structure of two NANDFLASH chips is controlled at the same time. According to the characteristics of double CE and page programming of the flash chip, the ping-pong pipelining control technology is introduced to realize the real-time and high-speed storage of the data. At the same time, the bad block list information is set up, which shields the bad block address of the flash chip and ensures the stable operation of the storage system. When the data is read back, the data of the memory card is read back to the computer by using the most communication bridge of the single card reader. This paper also introduces the hardware working mechanism of the card reader, the bad block management software, the conversion image software and the design method of the card reader application software. Finally, the system is summarized and prospected.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP333

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