嵌入式异构多核处理器的任务调度研究

发布时间：2019-05-28 17:08

【摘要】：随着嵌入式系统的应用日益多元化，异构多核处理器因运算能力强且成本较低等特性已经成为目前主流的解决方案。由于多核平台上目标应用的复杂度快速增长，为了更好地利用异构多核处理器的计算能力，合理的任务管理机制必不可少。异构多核处理器体系结构复杂，对工作在其上的操作系统进行任务调度和资源管理等成为研究难点。嵌入式系统在人们日常生活中的普及使得对异构环境下的任务调度方法的研究具有十分广阔的应用前景。异构多核处理器中，MPU将具有高运算需求的任务分配给DSP完成加速计算，提高处理效率并降低系统耗能。然而当多媒体应用的复杂度越来越高时，低效的任务调度和分配等会带来处理器间频繁的通信开销，，使系统效能大为降低。本文提出一种智能硬件任务调度系统，利用多媒体应用的串流特性，动态管理任务并分配任务给可用的处理器，它可用于异构多核处理器上的多媒体编解码等应用，提高DSP的效能。本文研究的任务调度系统架构提供高阶应用程序接口，易于构建多媒体应用模型。程序员不用考虑内存分配、任务调度、负载平衡、同步和资源竞争等架构细节。不仅负责运行中的任务管理，而且为处理器间通信分配内存。能高效地实现任务管理，通过并行处理MPU或其它内核上的任务，减小系统压力和开销。利用电子系统层级设计方法构建异构多核虚拟平台，模拟不同处理器架构和应用模型的任务管理流程，以ARM926开发板上MPEG4解码器的实现为例验证了本设计的有效性和实用性。大量的实验结果显示任务管理效率得到了显著的提高，同时仅需极少的硬件资源便可满足多媒体应用的效能需求。但是，对于这方面课题的研究尚不成熟，没有统一的标准，缺乏共用的研究样本。因此，需要在前人和个人的研究基础上，认真地开展后续的研究工作，进一步提高嵌入式异构多核处理器的效能。
[Abstract]:As the application of embedded system is becoming more and more diverse, heterogeneous multi-core processor has become the mainstream solution due to the strong operational capability and lower cost. Due to the rapid increase of the complexity of the target application on the multi-core platform, the reasonable task management mechanism is essential in order to better utilize the computing power of the heterogeneous multi-core processor. The heterogeneous multi-core processor architecture is complex, and the task scheduling and resource management of the operating system on the heterogeneous multi-core processor are difficult. The popularization of the embedded system in the daily life of people makes the research on the task scheduling method under the heterogeneous environment has a wide application prospect. In a heterogeneous multi-core processor, the MPU completes the task assignment with high operational requirements to the DSP to complete the acceleration calculation, improve the processing efficiency and reduce the system. Energy consumption. However, when the complexity of the multimedia application is higher and higher, the inefficient task scheduling and allocation can bring more frequent communication overhead among the processors, so that the system performance is greatly improved. This paper presents a kind of intelligent hardware task scheduling system, which uses the stream characteristics of the multimedia application, the dynamic management task and the task to the available processor, it can be used in the application of multimedia coding and decoding on the heterogeneous multi-core processor, improve the D The task scheduling system architecture of this paper provides a high-order application program interface, which is easy to construct. Building a multimedia application model. Programmers do not consider memory allocation, task scheduling, load balancing, synchronization, and capital Architecture details such as source competition. Not only is the task management in operation, but also for processing Inter-device communication memory. The task management can be implemented efficiently, by parallel processing tasks on the MPU or other core, reducing Small system pressure and overhead. A heterogeneous multi-core virtual platform is constructed by an electronic system level design method. The task management process of different processor architectures and application models is simulated. The implementation of the MPEG4 decoder on the ARM926 development board is verified as an example. This design is effective and practical. A large number of experimental results show that the task management efficiency is remarkably improved, and only a few hardware resources are required The performance needs of the multimedia application can be met. However, the research on this topic is not mature, and there is no system. A standard, lack of common research samples. Therefore, follow-up study needs to be carried out carefully on the basis of previous and individual studies, and furthe
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP332

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