基于CORDIC的FFT处理器设计及验证

发布时间：2019-07-05 05:53

【摘要】：波束形成是阵列信号处理过程的一个重要步骤，通过对接收的阵列数据进行线性组合处理得到指向某个方向的最大波束输出。波束形成器的性能对声纳、雷达等系统定位精度、处理能力和抗干扰能力等具有关键作用。本论文针对成像声纳系统中波束形成器的关键部件——FFT处理器的功能特性，深入分析了FFT算法流程，引入CORDIC算法简化复数乘法操作，基于FPGA平台设计实现了FFT处理器。经过时序仿真和硬件测试，运行速度达到90MHz，处理速度快，运算精度高，满足了成像声纳系统的需求。论文分析了CORDIC算法及基2、基4时域FFT算法的基本原理和流程。将CORDIC算法和基4时域FFT算法结合起来，采用流水线技术，，设计并实现了基于CORDIC的FFT处理器。该FFT处理器使用5级蝶形算法，各级蝶形算法之间构成流水线结构，能够完成1024点的FFT运算。为了满足成像声纳系统可靠性需求，应用基于VMM的功能验证技术，搭建分层次、可重用、自动化的功能验证平台。对所设计的FFT处理器进行了较为完备的功能验证，完成了FFT处理器的系统级验证工作，代码行覆盖率达到100%，条件覆盖率达到96.34%，状态机覆盖率达到100%，综合评分达到97.67%，提高了FFT处理器的可靠性。
文内图片：

图片说明：验证方法举例
[Abstract]:Beamforming is an important step in the process of array signal processing. The maximum beam output pointing to a certain direction is obtained by linear combination of the received array data. The performance of beamformer plays a key role in the positioning accuracy, processing ability and anti-interference ability of Sonar, radar and other systems. In this paper, according to the functional characteristics of FFT processor, which is the key component of beamformer in imaging Sonar system, the FFT algorithm flow is deeply analyzed, the CORDIC algorithm is introduced to simplify the complex multiplication operation, and the FFT processor is designed and implemented based on FPGA platform. Through time sequence simulation and hardware test, the running speed reaches 90MHz, the processing speed is fast and the operation precision is high, which meets the requirements of imaging Sonar system. In this paper, the basic principle and flow chart of CORDIC algorithm and base 2, base 4 time domain FFT algorithm are analyzed. Combining CORDIC algorithm with base 4 time domain FFT algorithm, a FFT processor based on CORDIC is designed and implemented by using pipeline technology. The FFT processor uses 5-level butterfly algorithm, and the pipeline structure is formed between the butterfly algorithms at all levels, which can complete the FFT operation of 1024 points. In order to meet the reliability requirements of imaging Sonar system, the functional verification technology based on VMM is applied to build a hierarchical, reusable and automatic functional verification platform. The designed FFT processor is verified by a more complete function, and the system-level verification of FFT processor is completed. The code line coverage is 100%, the conditional coverage is 96.34%, the state machine coverage is 100%, and the comprehensive score is 97. 67%. The reliability of FFT processor is improved.
【学位授予单位】：哈尔滨工程大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP332

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