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毫米波倍频源技术研究

发布时间:2018-10-08 10:11
【摘要】:随着毫米波技术的迅猛发展以及电子系统的不断更新换代,其对毫米波频率源的性能要求越来越严格。倍频链路是实现毫米波频率源的一种重要方式,它不仅能降低系统的振荡频率,同时兼具微波波段高的频率稳定度和低的相位噪声等优点。本文以倍频链路为基础,采用微波锁相环+倍频链路的方式实现了104GHz倍频源。倍频源的相位噪声性能取决于基波信号源,这是本文的难点之一。本文首先对锁相环的基本结构、传递函数及其噪声模型进行理论分析。在此基础上,采用锁相式频率技术,设计了具有低相噪、低杂散的13GHz基波信号源。测试结果显示13GHz锁相环的相位噪声达到-109.89dBc/Hz@10kHz;在2GHz带宽范围内,杂散抑制度优于-70dBc。倍频链路中末级二倍频器的倍频效率直接决定了倍频源的输出功率,准确的二极管模型以及采用变容管是提高倍频效率的关键所在。本文根据MA46H146变容管的C-V曲线提取其关键物理参数,并根据器件尺寸及经典的物理公式,使用三维电磁仿真软件HFSS建立三维封装模型。在此基础之上,使用HFSS和ADS相结合的方法,设计了串联单管结构的F波段二倍频器。测试结果表明,当输入驱动功率为80mW,外加-5V偏置电压时,二倍频器在103GHz处的输出功率达到12.6mW,倍频效率达到15%。在104GHz处的输出功率为7.7mW。目前,在此频段,国内还未见使用单管二倍频器获得相似的倍频效率。而且,二倍频器的仿真曲线和实测曲线一致性较好。最后,本文对104GHz本振源模块进行了整体性能测试。测试结果表明:104GHz源模块输出功率为8.6mW;相位噪声为-90.55dBc/Hz@10kHz;在3GHz带宽范围内,杂散抑制度优于-60dBc。
[Abstract]:With the rapid development of millimeter wave technology and the updating of electronic system, the performance requirements of millimeter wave frequency source are becoming more and more strict. Frequency doubling link is an important way to realize millimeter wave frequency source. It can not only reduce the oscillation frequency of the system, but also have the advantages of high frequency stability and low phase noise in microwave band. In this paper, based on the frequency doubling link, the microwave phase locked loop frequency doubling link is used to realize the 104GHz frequency doubling source. The phase noise performance of the frequency multiplier depends on the fundamental signal source, which is one of the difficulties in this paper. In this paper, the basic structure, transfer function and noise model of PLL are analyzed theoretically. Based on this, a 13GHz fundamental signal source with low phase noise and low spurious noise is designed by using phase-locked frequency technology. The results show that the phase noise of 13GHz PLL is -109.89dBc / Hz-10kHz, and the spurious suppression is better than -70dBc. within the bandwidth of 2GHz. The frequency doubling efficiency of the last stage frequency multiplier in the frequency doubling link directly determines the output power of the frequency doubling source. Accurate diode model and the use of varactor are the key to improve the frequency doubling efficiency. In this paper, the key physical parameters of MA46H146 varactor are extracted according to its C-V curve. According to the size of the device and the classical physical formula, the three-dimensional packaging model is established by using the three-dimensional electromagnetic simulation software HFSS. On this basis, using the method of combining HFSS and ADS, the F band frequency multiplier with series single transistor structure is designed. The test results show that when the input driving power is 80mW and the bias voltage is -5V, the output power of the doubler at 103GHz reaches 12.6mW, and the frequency doubling efficiency reaches 15mW. The output power at 104GHz is 7.7 MW. At present, no similar frequency doubling efficiency has been achieved in this frequency band by using a single-transistor doubler. Moreover, the simulation curve of the doubler is in good agreement with the measured curve. Finally, the overall performance of the 104GHz local oscillator module is tested. The test results show that the output power of the: 104GHz source module is 8.6 MW, the phase noise is -90.55dBc / Hzr @ 10kHz, and the spurious suppression is better than -60dBc. in the 3GHz bandwidth.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN851.4

【参考文献】

相关硕士学位论文 前1条

1 詹铭周;W波段锁相倍频源技术研究[D];电子科技大学;2007年



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