数字电视芯片验证硬件平台的设计与应用

发布时间：2018-01-24 10:03

本文关键词： FPGA EP3SL340芯片数字电视硬件设计　出处：《中国科学院大学(工程管理与信息技术学院)》2016年硕士论文　论文类型：学位论文

【摘要】：随着集成电路设计技术和半导体工艺技术的不断进步,芯片设计的规模和设计复杂度飞速增长,单一的芯片就能够完成数字电视接收中的解调和音视频解码部分,成为大规模集成电路和下一代数字电视芯片的发展趋势,因而根据芯片系统的特点,提高验证的效率和验证的可重用性变得十分必要。本文研究了数字电视芯片验证硬件平台的设计与应用,主要工作如下：首先介绍了课题的研究背景、意义以及相关技术的研究现状。分析了课题涉及的数字电视接收技术、硬件板级设计流程、FPGA设计验证流程,以及硬件设计中所使用的软件工具。其次介绍了数字电视芯片验证硬件的整体需求和EP3SL340的功能特点及体系结构,包括输入输出布局和设计原则、互连接线资源、数据信号处理块和时钟网络等。然后基于FPGA的芯片架构和接口资源,分析了数字电视接收芯片验证平台的设计思路,给出了基于EP3SL340的数字电视芯片验证平台的设计方案,进而分析了信号解调和信道解码板和信源解码板中模块的功能和实现方法,包括存储、音频、视频、MPEG接口,人机接口、时钟和电源模块等。并根据PCB的布局和布线原则,完成了EP3SL340硬件平台的PCB设计和生产。最后搭建测试环境,对验证平台进行了功能测试和性能测试,结合工程中的典型应用,验证了硬件平台的有效性,测试结果达到了设计要求。本文研究的基于Stratix EP3SL340芯片设计的硬件平台,在此硬件平台上,可以设计数字电视信源处理相关的芯片,并且根据不同应用和不同接口可以扩展。电路板性能可靠稳定,能适应各种数字电视接口,包含各种存储方案,视频输出方案、音频输出方案等。
[Abstract]:With the development of integrated circuit design technology and semiconductor technology, the scale and complexity of chip design are increasing rapidly. A single chip can complete the demodulation and audio / video decoding in the digital television reception, and become the development trend of the large-scale integrated circuit and the next generation digital TV chip, so according to the characteristics of the chip system. It is necessary to improve the efficiency of verification and the reusability of verification. This paper studies the design and application of digital TV chip verification hardware platform. The main work is as follows: firstly, the research background is introduced. The significance and research status of related technologies are analyzed. The digital television receiving technology, hardware board level design flow and FPGA design verification flow are analyzed. And the software tools used in the hardware design. Secondly, it introduces the overall requirements of the digital television chip verification hardware and the functional characteristics and architecture of EP3SL340, including the input and output layout and design principles. Based on the chip architecture and interface resources of FPGA, the design idea of digital television receiving chip verification platform is analyzed. The design scheme of digital TV chip verification platform based on EP3SL340 is presented, and the functions and implementation methods of the modules in signal demodulation and channel decoding board and source decoding board are analyzed, including storage. Audio, video, MPEG interface, man-machine interface, clock and power module, etc., and according to the layout and wiring principles of PCB. The PCB design and production of the EP3SL340 hardware platform is completed. Finally, the test environment is built, and the function test and performance test of the verification platform are carried out, combining with the typical application in engineering. The validity of the hardware platform is verified and the test results meet the design requirements. The hardware platform based on Stratix EP3SL340 chip is studied in this paper. Digital TV source processing chip can be designed, and according to different applications and different interfaces can be expanded. The circuit board performance is reliable and stable, can adapt to all kinds of digital television interfaces, including various storage schemes. Video output scheme, audio output scheme and so on.
【学位授予单位】：中国科学院大学(工程管理与信息技术学院)
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN949.197

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