高速数传解调技术研究与实现

发布时间：2018-06-09 04:48

本文选题：卫星通信 + 高速数传　；参考：《南京理工大学》2017年硕士论文

【摘要】：近年来,宽带卫星通信系统得到了巨大的发展,传输的数据也越来越快,所以高速数据传输技术的研究迫在眉睫。此外,军事和国防应用中各种侦察机、预警机、探测卫星等等都迫切得需求高数数据传输系统来获取和传递大量的数据信息。因此研究和发展高速数据传输技术对未来星地高速信息的传输具有重大的意义。目前来说,高速数传系统大都是采用全数字的调制解调结构方式,调制解调技术的关键就是同步技术。本文以某项目为背景,对高速数据传输技术的解调技术进行了分析和研究。本文以应用需求为背景对高速数传系统进行了深入的研究,系统地论述了一种高速数传解调方案,核心思想就是各模块进行并行处理,以资源换取速度,提高数据传输的速度。本文的研究包括以下几个方面:分析比较了各种调试方式的性能,然后选择了频带利用率和功率利用率都较好的QPSK调制方式;LDPC编译码的实现;高速并行查找表成型滤波器的设计与实现;高速时域并行匹配滤波器的设计与实现;基于数字Costas环的载波同步环路结构的仿真与实现;利用Gardner算法的位定时同步方案的实现;Farrow分段抛物内插滤波器的参数设计、性能分析以及并行的结构实现。最后,给出了系统的硬件设计以及系统测试结果,证明了方案的正确性与可行性。
[Abstract]:In recent years, the broadband satellite communication system has been a huge development, the transmission of data is becoming faster and faster, so the study of high-speed data transmission technology is urgent. In addition, in military and national defense applications, a variety of reconnaissance aircraft, early warning aircraft, detection satellites, and so on, are in urgent need of high-number data transmission systems to obtain and transfer a large amount of data information. Therefore, the research and development of high-speed data transmission technology is of great significance to the future satellite-ground high-speed information transmission. At present, the high speed data transmission system mostly adopts all digital modulation and demodulation structure, the key of modulation and demodulation technology is synchronization technology. Based on a project, the demodulation technology of high-speed data transmission technology is analyzed and studied in this paper. In this paper, a high speed data transmission system is studied in the background of application requirement, and a high speed data transmission demodulation scheme is systematically discussed. The core idea is that each module can be processed in parallel to exchange resources for speed and improve the speed of data transmission. The research of this paper includes the following aspects: the performance of various debugging methods is analyzed and compared, and then QPSK modulation mode, which has good bandwidth efficiency and power efficiency, is selected to realize LDPC coding and decoding; Design and implementation of high speed parallel look-up table shaping filter, design and implementation of high speed time domain parallel matched filter, simulation and implementation of carrier synchronization loop structure based on digital Costas loop; Using Gardner algorithm to realize bit timing synchronization the parameter design performance analysis and parallel implementation of Farrow parabolic interpolation filter are presented. Finally, the hardware design and test results of the system are given, and the correctness and feasibility of the scheme are proved.
【学位授予单位】：南京理工大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN927.2;TN919.3

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