可见光DCO-OFDM通信系统信道估计算法研究及其实现

发布时间：2018-04-06 04:16

本文选题：可见光通信　切入点：DCO-OFDM　出处：《东南大学》2017年硕士论文

【摘要】：可见光通信具有照明和同时实现高速数据通信的优势,因而成为近年来无线通信领域的研究热点之一。DCO-OFDM是可见光通信实现高速数据传输的主要调制方式,DCO-OFDM系统的信道估计是接收机的关键模块之一。本文对DCO-OFDM系统的信道估计问题进行了研究,主要研究内容如下:一、研究了可见光DCO-OFDM系统中基于导频的DFT信道估计算法。无虚载波的基于DFT算法准确度较高,改进了设定噪声阈值门限法进一步提高估计精度。对于应用在实际系统中存在虚载波的基于DFT算法,存在能量泄漏问题,分别采用补偿虚载波处信道值的重复边缘值法、部分子载波替换法及最优补偿DFT算法,也采用时域修正估计算法进行改进,性能都有所提升,并对算法进行了仿真分析。二、改进了基于可靠判决反馈的ML信道估计算法。基于可靠判决反馈的ML信道估计算法,将可靠性较高即BER较低的符号作为反馈的准导频,通过二次估计提高了估计精度,但是该算法在低信噪比时可靠的符号较少,性能并没有改善。针对此问题提出了基于可靠判决反馈的ML信道估计改进算法,在不同的信噪比情况下,设置不同的BER门限,使得在低信噪比时也有一定的反馈的准导频数,从而可以提高在低信噪比时的估计性能。三、改进了基于压缩感知的ROMP时域稀疏信道估计算法。研究了简单的贪婪类迭代算法,包括OMP算法、ROMP算法,OMP算法简单且准确度较高,而ROMP算法在正则化过程中存在的选择错误原子的可能性,针对此问题提出了改进算法。改进算法对正则化过程进行改进,减小正则化系数,并且选择平均能量最大的原子组而不是选择能量和最大的原子组,降低了选择错误原子的可能性,并进行仿真分析。四、对可见光DCO-OFDM系统中的信道估计模块进行硬件实现,采用Xilinx Kintex 7系列的FPGA开发板。介绍了 VLC系统整体架构的设计,确定了信道估计模块的定点方案,并比较定点与浮点仿真的性能差异,研究了信道估计模块的FPGA实现过程、包含子模块(ROM矩阵、乘法累加器、FFT模块)、端口信号及主要数据的时序,并在开发板上进行了测试。
[Abstract]:Visible light communication has the advantages of lighting and realizing high-speed data communication at the same time.In recent years, DCO-OFDM is one of the most important modulation methods for high-speed data transmission in visible light communication. The channel estimation of DCO-OFDM system is one of the key modules of receiver.In this paper, the channel estimation problem of DCO-OFDM system is studied. The main contents are as follows: first, the pilot based DFT channel estimation algorithm in visible light DCO-OFDM system is studied.The accuracy of the algorithm based on DFT without virtual carrier is high, and the noise threshold threshold method is improved to improve the estimation accuracy.For the problem of energy leakage based on DFT algorithm which has virtual carrier in practical system, the repetitive edge value method, partial subcarrier replacement method and optimal compensation DFT algorithm are used to compensate channel value at virtual carrier, respectively.Time domain modified estimation algorithm is also used to improve the performance, and the algorithm is simulated and analyzed.Secondly, the ML channel estimation algorithm based on reliable decision feedback is improved.In the ML channel estimation algorithm based on reliable decision feedback, the high reliability symbol, that is, the lower BER symbol, is taken as the quasi-pilot of the feedback, and the estimation accuracy is improved by quadratic estimation, but the reliable symbol is less when the signal-to-noise ratio is low.Performance has not improved.To solve this problem, an improved ML channel estimation algorithm based on reliable decision feedback is proposed. Under different SNR conditions, different BER thresholds are set, so that there is a certain number of quasi-pilots for feedback at low SNR.Therefore, the estimation performance can be improved at low signal-to-noise ratio (SNR).Thirdly, the ROMP time domain sparse channel estimation algorithm based on compressed sensing is improved.In this paper, a simple greedy class iterative algorithm is studied, including OMP algorithm, which is simple and accurate, while ROMP algorithm has the possibility of selecting wrong atoms in the regularization process, and an improved algorithm is proposed to solve this problem.The improved algorithm improves the regularization process, reduces the regularization coefficient, and selects the group of atoms with the highest average energy instead of the group of the largest energy and the largest group of atoms, which reduces the possibility of selecting the wrong atom and makes the simulation analysis.Fourthly, the channel estimation module in the visible light DCO-OFDM system is implemented by using the FPGA development board of Xilinx Kintex 7 series.This paper introduces the design of the overall architecture of VLC system, determines the fixed-point scheme of channel estimation module, compares the performance difference between fixed-point simulation and floating-point simulation, and studies the FPGA implementation process of channel estimation module, which includes sub-module and ROM matrix.The multiplicative accumulator and FFT module, the timing of port signal and main data are tested on the development board.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN929.1

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