数字阵列雷达扩展目标回波模拟技术研究与实现

发布时间：2019-02-17 07:52

【摘要】：随着雷达信号处理技术的不断发展以及雷达系统硬件实现平台处理能力的不断提高,更大阵元规模和信号处理带宽的有源相控阵数字阵列雷达系统不断出现,其角度分辨率和距离分辨率随之显著提高。传统的点目标单通道雷达回波模拟系统已经不能有效地满足系统各项指标的模拟测试要求,急需多通道扩展目标回波模拟系统。本文针对上述需要研制了一款基于VPX总线架构,可应用于任意波形回波模拟的数字阵列雷达扩展目标回波模拟系统。本文主要工作如下:首先,开展了扩展目标散射中心建模及其角度闪烁计算分析,进而给出了 96通道扩展目标雷达回波模拟系统的实现方案。接着,开展了雷达回波模拟系统的研制,该系统采用高性能8核DSP——TMS320C6678与分布式Virtex-7 + Kintex-7 FPGA的处理器架构,通过直接采样中频雷达发射信号,并根据上位机软件的设定参数,动态产生96通道中频雷达接收回波模拟信号。回波模拟信号包括:基于多散射中心模型的扩展目标回波模拟信号、欺骗式干扰信号和高斯白噪声信号等。整个雷达回波模拟系统采用VPX6U标准结构,由一块高性能处理电路与三块高速DAC阵列电路组成,具有通用性和可扩展性强的特点。其中,高性能处理电路负责回波相关参数计算,用于产生单通道扩展目标回波信号与干扰信号。每块高速DAC阵列电路根据高性能处理电路的参数计算结果与输出的单通道目标回波及干扰信号,分别独立产生32通道的中频回波模拟信号。最后,在所研制的雷达回波模拟系统平台上,完成了高性能处理电路与高速DAC阵列电路相关FPGA和DSP软件程序的设计和实现,并开展了系统基本功能和性能的测试验证。初步测试结果表明所构建的系统可以根据上位机软件的参数设定,实时正确地产生任意发射波形的扩展目标回波信号与欺骗式干扰信号,相关参数计算准确。该雷达回波模拟系统可以作为数字阵列雷达中频半实物仿真平台,在扩充射频发射通道和发射天线阵列后,还可以用于构建完整的射频半实物仿真系统。
[Abstract]:With the continuous development of radar signal processing technology and the improvement of radar system hardware implementation platform processing ability, the active phased array digital array radar system with larger array size and signal processing bandwidth is emerging. The angle resolution and range resolution are improved significantly. The traditional point target single channel radar echo simulation system can not meet the requirements of the simulation and test of the system indexes effectively, so the multi-channel extended target echo simulation system is urgently needed. In this paper, a digital array radar extended target echo simulation system based on VPX bus architecture is developed, which can be used in the simulation of arbitrary waveform echo. The main work of this paper is as follows: firstly, the modeling of extended target scattering center and the analysis of angle scintillation are carried out, and the implementation scheme of 96 channel extended target radar echo simulation system is presented. Then, the radar echo simulation system is developed. The system adopts the processor architecture of high performance 8-core DSP--TMS320C6678 and distributed Virtex-7 Kintex-7 FPGA, and transmits signals by direct sampling if radar. According to the set parameters of upper computer software, 96 channels if radar receive echo analog signal dynamically. The echo analog signals include the extended target echo analog signal based on the multi-scattering center model, the deception jamming signal and Gao Si white noise signal. The whole radar echo simulation system adopts VPX6U standard structure and consists of a high performance processing circuit and three high-speed DAC array circuits. It has the characteristics of universality and expansibility. The high performance processing circuit is responsible for the calculation of echo parameters and is used to generate single channel extended target echo signal and interference signal. Each high speed DAC array circuit generates 32 channel if echo analog signals independently according to the calculation results of the parameters of the high performance processing circuit and the output single channel target echo signal. Finally, on the platform of radar echo simulation system, the design and implementation of FPGA and DSP software related to high performance processing circuit and high speed DAC array circuit are completed, and the basic functions and performance of the system are tested and verified. The preliminary test results show that the system can generate the extended target echo signal and deceptive jamming signal of arbitrary transmitting waveform in real time according to the parameter setting of upper computer software. The calculation of relevant parameters is accurate. The radar echo simulation system can be used as an intermediate frequency hardware-in-the-loop simulation platform for digital array radar. After extending the RF transmission channel and antenna array, it can also be used to construct a complete RF hardware-in-the-loop simulation system.
【学位授予单位】：南京理工大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN957.51

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