基于相变存储器的混合主存缓冲区管理问题研究

发布时间：2018-10-22 14:05

【摘要】：随着计算机技术的高速发展,当前网络、数据中心、高性能计算等领域的数据规模呈现爆炸性的增长。由于数据应用规模的增大,对于数据存取速度的要求也越来越高。磁盘作为传统的数据存储介质,由于其机械寻道的特性,I/0速度很难提高,已难以满足如今大规模数据存取的速度需求。为了解决这一问题,使用大容量主存来存放重要数据的思想被提出,并在学术界和工业界受到了重视,这带来了未来对大容量主存的迫切需求。然而,面对大容量主存需求的趋势,传统的主存存储介质DRAM的缺陷,成为了制约大容量主存系统应用的瓶颈。DRAM的存储密度提升困难,单位存储成本远高于磁盘和固态硬盘。此外,DRAM的能耗较高,且随着DRAM容量的提升成比例增长。因此,使用DRAM构建大容量主存系统,代价十分高昂。相变存储器(Phase Change memory, PCM)是一种使用硫族化合物作为存储介质的新型主存存储技术,利用材料在不同状态下的电阻差异来保存数据。相变存储器具有以下特点：无机械部件,可按位寻址,断电后数据不丢失,无空闲能耗,存储密度大,读写速度快等。与DRAM相比,相变存储器在非易失性、存储密度和能耗方面具有很大的优势,被认为是最有希望取代DRAM的下一代主存存储介质。因此,如何在现有计算机体系架构中使用相变存储器成为了当前学术界研究的热点之一。然而,相变存储器也同样存在着不足之处。首先,相变存储器具有读写不对称性,写延迟约为DRAM的7到20倍;其次,相变存储器存在耐久性问题,每个存储单元的可擦写次数有限。因此,现阶段难以直接使用相变存储器取代DRAM。使用DRAM和相变存储器作为同级主存,构建相变存储器DRAM的混合主存系统,同时利用DRAM的写性能优势和相变存储器的存储容量优势,被认为是一种合理的解决方案。由于混合主存架构同时具有两种性能不同的存储介质,传统的基于DRAM主存的数据管理技术不适用于混合主存架构。在这些数据管理技术当中,缓冲区管理算法是一项至关重要的技术,直接影响了主存系统的性能表现。在传统的DRAM主存系统中,缓冲区命中率是最重要的性能指标,缓冲区管理算法主要关注如何提升命中率。然而对于混合主存系统,缓冲区管理算法不仅需要考虑命中率,还需要考虑如何在两种不同的存储介质中分配和管理数据,以降低相变存储器的写负担,提升混合主存系统的整体性能。本论文针对以相变存储器和DRAM作为同级主存的混合主存架构环境下的缓冲区管理问题展开研究。论文围绕着如何在保证缓冲区命中率的条件下降低相变存储器写次数这一核心问题,深入研究适用于混合主存架构的缓冲区管理算法,在传统缓冲区管理算法的基础上,提出了一系列可有效降低相变存储器写次数、提高混合主存系统整体性能的缓冲区管理算法。论文首先介绍相变存储器技术的研究背景和相关技术,从在现有计算机体系结构引入相变存储器的方法和基于相变存储器的数据管理技术这两个方面,总结了当前国内外研究现状,重点分析了现有的基于混合主存的缓冲区管理算法研究工作,发现当前研究工作中存在的缓冲区命中率下降和部分访问模式下不能降低相变存储器写次数的问题,并指出产生这些问题的原因。然后,本文以传统的LRU缓冲区管理算法为基础,根据混合主存环境的需求,改进了LRU算法的页面载入机制,在保证缓冲区命中率不变的前提下有效地降低了混合主存内相变存储器的写次数；随后,本文提出了一个相变存储器内页面写热度判断机制和一个DRAM/相变存储器间页面交换机制,在不降低命中率的条件下有效地解决了相变存储器内页面变为写热页的问题,将该机制引入改进了页面载入的LRU算法,进一步提升了算法性能；最后,本文分析了相变存储器上发生置换操作对相变存储器造成的写负担,提出了一种考虑在DRAM／相变存储器之间平衡页面置换的缓冲区管理算法。本论文的主要贡献可归纳为以下几个方面：(1)提出了一种“置换时迁移页面”的策略和采用该策略的基于LRU算法的混合主存缓冲区管理算法MHR-LRU。当发生页面置换时,MHR-LRU根据页面请求类型通过相变存储器与DRAM之间迁移页面方法将被请求页载入到合适的存储介质中,在保证命中率不变的同时减少了相变存储器由于载入页面造成的写操作次数和未来发生在相变存储器上的写操作次数,提升混合主存的整体性能。(2)在MHR-LRU算法的基础上,针对相变存储器内的页面变为写热页的问题,提出了一个采用DRAM/相变存储器间页面交换机制的改进算法MWQ-LRU。MWQ-LRU算法综合考虑了页面的写频率和最近写访问时间判断页面是否为写热页,并将相变存储器内被判断为写热页的页面与DRAM中写热度低的页面进行交换。MWQ-LRU算法可以在保证命中率与LRU算法相同的条件下,将写热页尽可能地保存在DRAM中,进一步降低相变存储器的写次数。(3)针对现有的基于混合主存的缓冲区管理算法在读操作密集的负载下不能有效减少相变存储器写负担的问题,指出在读操作密集的负载下相变存储器的写负担主要来自于相变存储器上发生的页面置换,而现有工作没有关注页面置换对相变存储器的影响,并提出了一个考虑页面置换影响的混合主存缓冲区管理算法D-CLOCK。该算法能够减少相变存储器由于页面置换操作造成的写负担并保持命中率,在读密集负载下能够有效降低相变存储器的写次数。
[Abstract]:With the rapid development of computer technology, the data scale in the current network, data center, high-performance computing and so on presents explosive growth. Because of the increase of data application scale, the demand for data access speed is getting higher and higher. Disk as a traditional data storage medium, I/ 0 speed is difficult to improve due to its mechanical homing characteristics, and it is difficult to meet the speed requirement of large-scale data access today. In order to solve this problem, the idea of using large-capacity main memory to store important data is put forward and paid more attention to the academia and industry, which brings about the urgent need for large-capacity main storage in the future. However, in the face of the trend of large capacity storage demand, the defect of traditional main memory storage medium DRAM has become the bottleneck restricting the application of large capacity main memory system. The storage density of DRAM is difficult, and the unit storage cost is much higher than that of magnetic disk and solid-state hard disk. In addition, the energy consumption of the DRAM is high, and the DRAM capacity increases in proportion. Therefore, using DRAM to construct large capacity main memory system, the cost is very high. Phase change memory (PCM) is a new type of main memory storage technology using sulfur compounds as storage medium, and uses the resistance difference of materials in different states to store data. The phase change memory has the following characteristics: no mechanical parts, no data loss after power failure, no idle energy consumption, large storage density, high reading and writing speed and the like. Compared with DRAM, the phase-change memory has great advantages in the aspects of non-volatility, storage density and energy consumption, and is considered to be the next generation main storage storage medium which is most promising to replace DRAM. Therefore, how to use the phase-change memory in the existing computer system architecture has become one of the hot topics in the field of academia. However, the phase change memory also suffers from deficiencies. firstly, the phase-change memory has read-write asymmetry and write delay is about 7-20 times of the DRAM; secondly, the phase-change memory has durability problem, and the erasable number of each memory cell is limited. Therefore, it is difficult to directly use the phase change memory to replace the DRAM at this stage. By using DRAM and phase-change memory as the main memory of the same level, the hybrid main memory system of phase-change memory DRAM is constructed, and simultaneously the write performance advantage of DRAM and the storage capacity advantage of phase-change memory are utilized to be considered as a reasonable solution. Because the hybrid main memory architecture has two different storage media, the traditional DRAM-hosted data management technology does not apply to the hybrid main memory architecture. In these data management technologies, the buffer management algorithm is a key technology, which directly affects the performance of main memory system. In the traditional DRAM main memory system, the buffer hit rate is the most important performance index, and the buffer management algorithm mainly focuses on how to improve the hit rate. However, for the hybrid main memory system, the buffer management algorithm not only needs to take into account the hit rate, but also needs to consider how to allocate and manage data in two different storage media, so as to reduce the write burden of the phase change memory and improve the overall performance of the hybrid main memory system. In this paper, we study the buffer management problem under the mixed main memory architecture with phase change memory and DRAM as the main memory of the same level. Based on the traditional buffer management algorithm, this paper focuses on how to reduce the number of write times of phase change memory under the condition of guaranteeing the hit rate of buffer zone. A series of buffer management algorithms which can effectively reduce the number of write times of the phase change memory and improve the overall performance of the hybrid main memory system are proposed. The paper first introduces the research background and related technology of phase change memory technology, introduces the current research status at home and abroad from two aspects of introducing phase change memory into existing computer architecture and data management technology based on phase change memory. This paper focuses on the research work of the existing buffer management algorithm based on mixed main memory, and finds that the buffer hit ratio and partial access mode existing in the current research work cannot reduce the number of write times of the phase change memory, and points out the causes of these problems. Then, based on the traditional LRU buffer management algorithm, this paper improves the page loading mechanism of LRU algorithm according to the requirement of mixed main storage environment, and effectively reduces the number of write times of phase-change memory in the main memory under the premise of ensuring that the hit ratio of the buffer zone is unchanged, and then, The invention provides a page write heat judgment mechanism in a phase change memory and a page switching mechanism between a DRAM/ phase change memory, which effectively solves the problem that the page in the phase change memory becomes a write hot page without reducing the hit rate, By introducing the mechanism into the LRU algorithm which improves the page loading, the algorithm performance is further improved; and finally, the writing burden caused by the permutation operation on the phase-change memory is analyzed in the paper, A buffer management algorithm considering balancing page replacement between DRAM/ phase-change memories is presented. The main contributions of this thesis can be summarized as follows: (1) a new method is proposed "Move Page During Displacement" and a hybrid host buffer management algorithm MHR-LRU based on the LRU algorithm of the policy. when a page replacement occurs, the MHR-LRU loads the requested page into a suitable storage medium according to the page request type through the migration page method between the phase change memory and the DRAM, the invention reduces the number of write operations caused by the loading page and the number of write operations that occur on the phase change memory in the future while ensuring that the hit rate is unchanged, and improves the overall performance of the mixed main memory. (2) on the basis of the MHR-LRU algorithm, the page in the phase change memory becomes a write hot page, An improved algorithm MWQ-LRU (MWQ-LRU) based on page switching mechanism between DRAM/ phase change memory is presented, which takes into account the page's write frequency and the latest write access time to judge whether the page is a write hot page. and the page which is judged as the write hot page in the phase change memory is exchanged with a page with low writing heat in the DRAM. The MWQ-LRU algorithm can save the write hot page as much as possible in the DRAM under the same conditions as the LRU algorithm, and further reduce the number of write times of the phase change memory. (3) Aiming at the problem that the existing buffer management algorithm based on the mixed main memory cannot effectively reduce the writing burden of the phase change memory under the load of the intensive load, the write burden of the phase change memory under the load of the read operation is mainly derived from the page permutation occurring on the phase change memory, In this paper, the influence of page permutation on phase change memory is not concerned, and a mixed main memory buffer management algorithm D-CLOCK considering page replacement is proposed. The algorithm can reduce the write burden caused by the page displacement operation of the phase change memory and keep the hit ratio, and can effectively reduce the number of writing times of the phase change memory under the read intensive load.
【学位授予单位】：中国科学技术大学
【学位级别】：博士
【学位授予年份】：2016
【分类号】：TP333

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