基于JTAG的MCU调试模块设计与实现

发布时间：2018-06-12 03:44

本文选题：JTAG + MCU　；参考：《西安科技大学》2013年硕士论文

【摘要】：嵌入式微控制器（MCU）片内集成了CPU、通信接口、模数和数模外设、内存等部件，已逐渐发展成为片上系统（SOC），简化了应用系统设计，使计算机技术从大型的通用型数值计算领域进入到小型化、智能化领域，扩大了计算机技术的应用范围。在嵌入式系统开发过程中，系统软硬件调试是嵌入式系统开发的重要环节，一个高效强大的调试系统可以大大缩短系统的开发周期，增强产品的竞争力。在嵌入式应用系统中，如何利用可控的调试手段实现对芯片内部测试与软件运行状态监控一直是微控器调试技术的一个难点。目前基于JTAG协议标准（IEEE Standard1149.1-TESTAccess Portand Boundary-Scan Architecture）的在线调试技术仍是嵌入式应用系统最有效的调试方式。基于JTAG标准的调试技术，就是在MCU芯片内设计符合JTAG协议标准的内嵌调试结构和模块，实现对目标CPU启停控制，设置程序计数器，读/写内存，块读/写，设置硬件断点以及对片内FLASH在线擦除编程等操作，方便用户对MCU应用系统的在线开发调试。 MCU内嵌JTAG接口后，MCU程序的下载以及片上存储器的读写就可以通过JTAG接口进行。但一般实现的JTAG接口安全性较差，只要符合JTAG标准的控制器就可以将程序代码读出。本文结合一款16位低功耗微控制器（MCU）的设计，提出了一种JTAG调试功能模块的结构设计，在芯片上集成了JTAG熔丝，应用开发工程师在软件开发结束后可以通过熔断JTAG熔丝的方法，使得非授权用户无法读取片内存储器的内容，，保护了自身的知识产权。同时对部分JTAG引脚采用多功能复用设计，节省的引脚资源可用于外设以丰富产品的功能，或是缩小封装体积，实现小型化，降低使用成本。在此基础上，采用0.25um CMOS工艺，完成了芯片的电路和版图设计，并进行了流片和测试。
[Abstract]:Embedded microcontroller (MCU) integrated with CPU, communication interface, analog and digital peripheral, memory and so on, has gradually developed into a system on a chip, which simplifies the design of application system. In the process of developing embedded system, the computer technology has entered the field of miniaturization and intelligentization from the field of large-scale general numerical calculation, and the application of computer technology has been expanded. System hardware and software debugging is an important part of embedded system development. An efficient and powerful debugging system can greatly shorten the development cycle of the system and enhance the competitiveness of the products. In the embedded application system, how to use controllable debugging means to realize the chip internal testing and software running state monitoring has been a difficult point in the microcontroller debugging technology. At present, the on-line debugging technology based on JTAG protocol standard, IEEE Standard 1149.1-TESTAccess Port and Boundary ary-Scan Architecture, is still the most effective debugging method for embedded application system. The debugging technology based on JTAG standard is to design embedded debugging structure and module in MCU chip, which conforms to JTAG protocol standard. To achieve the target CPU start and stop control, set up program counters, read / write memory, block read / write, set hardware breakpoints and on-chip flash online erasure programming operations, etc. It is convenient for users to develop and debug MCU application system on line. The download of MCU program and the reading and writing of on-chip memory can be carried out through JTAG interface after embedded JTAG interface in MCU. However, the JTAG interface implemented in general is of poor security, so long as the controller can read the program code according to the JTAG standard. Based on the design of a 16-bit low power microcontroller (MCU), a JTAG debugging function module is designed. The JTAG fuse is integrated on the chip, and the application development engineer can fuse the JTAG fuse after the software development is finished. This prevents unauthorized users from reading the contents of on-chip memory and protects their intellectual property rights. At the same time, some JTAG pins are designed with multifunctional reuse. The saved pin resources can be used to enrich the functions of the products, or to reduce the package size, realize miniaturization and reduce the cost of use. On this basis, the circuit and layout of the chip are designed by using 0.25um CMOS technology, and the chip flow and test are carried out.
【学位授予单位】：西安科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TN402

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