FMC模块化数据采集系统硬件设计与实现
发布时间：2019-03-18 18:34
【摘要】：随着高集成化电路和FPGA应用的快速发展,测试系统模块化架构设计已经成为一种趋势。FMC(FPGA Mezzanine Card)是一种专门针对FPGA所定义的互联接口,在模块化数据采集系统的设计与实现中得到广泛应用。一方面,FMC模块之间的复用性和重构性为实现多功能数据采集系统奠定了基础;另一方面,FMC接口的高速多针特性有助于提升系统的采样率及带宽等性能指标。因此,基于FMC模块化构架的数据采集系统设计逐渐成为国内外学者研究的热点。论文基于FMC互联技术,设计了四种型号的FMC采集模块,分别为FMC3028(双通道3GSPS/8bits)、FMC1548(双通道1.5GSPS/8bits)、FMC4214(双通道400 MSPS/14 bits)和FMC5212(双通道500 MSPS/12 bits);同时,还设计了一种能兼容这四种采集模块的数据处理载板。模块与载板之间在物理互联的基础上,由载板FPGA中的接口逻辑进行控制而完成通信;其不同的组合方式可以实现功能特性各异的数据采集系统,适用于各种高速、高精度采集场合,具有高带宽、大动态范围等优势。FMC采集模块的兼容性接口逻辑设计划分为三种通用功能电路:型号识别及加密电路,采样时钟生成电路以及温度电压监控电路。其中,型号识别及加密电路采的主要功能是识别FMC采集模块的型号和保护系统设计的知识产权;采样时钟生成电路的主要功能是通过SPI总线配置采样时钟参数,产生相应的时钟供给ADC完成模数转换;温度电压监控电路的主要功能是对模块子板卡的温度、电压进行采集,并且把数据及时传给上位机显示和分析。在载板的数据流控方面,首先采用ChipSync技术实现对并行高速数据流的接收和处理;然后调用FPGA的DDR3 SDRAM存储控制IP核,完成大数据触发存储;最后,通过CPCI标准总线实现与上位机的命令通信,并完成高速大容量的数据流上传与显示。最后通过对型号识别及加密、采样时钟生成、温度电压监控、数据流接收以及触发存储电路的测试,验证了各个模块的功能实现;而且,上位机对采集数据的分析结果表明,每个FMC采集模块的SNR、SFDR及输入带宽等参数指标均到达了设计要求。
[Abstract]:With the rapid development of highly integrated circuits and FPGA applications, the modular architecture design of test systems has become a trend. FMC (FPGA Mezzanine Card) is a kind of interconnection interface defined specifically for FPGA. It is widely used in the design and implementation of modular data acquisition system. On the one hand, the reusability and reconfiguration between FMC modules lay the foundation for the realization of multi-function data acquisition system; on the other hand, the high-speed multi-pin characteristic of FMC interface is helpful to improve the sampling rate and bandwidth of the system. Therefore, the design of data acquisition system based on FMC modular architecture has gradually become a hot research topic at home and abroad. Based on FMC interconnection technology, four kinds of FMC acquisition modules are designed, which are FMC3028 (dual channel 3GSPS/8bits), FMC1548 (dual channel 1.5GSPS/8bits), FMC4214 (dual channel 400 MSPS/14 bits) and FMC5212 (dual channel 500 MSPS/12 bits);). At the same time, a data processing board compatible with these four acquisition modules is designed. The communication between the module and the board is controlled by the interface logic of the board FPGA on the basis of physical interconnection. Its different combination mode can realize the data acquisition system with different functions and characteristics, which is suitable for all kinds of high-speed and high-precision acquisition occasions, and has high bandwidth. The compatibility interface logic design of FMC acquisition module is divided into three general functional circuits: model identification and encryption circuit, sampling clock generation circuit and temperature and voltage monitoring circuit. Among them, the main function of model identification and encryption circuit acquisition is to identify the type of FMC acquisition module and protect the intellectual property rights of the system design; The main function of the sampling clock generation circuit is to configure the sampling clock parameters through the SPI bus to generate the corresponding clock to supply the ADC to complete the analog-to-digital conversion. The main function of the temperature and voltage monitoring circuit is to collect the temperature and voltage of the module board and transmit the data to the upper computer in time for display and analysis. In the aspect of data flow control of the board, firstly, the ChipSync technology is used to receive and process the parallel high-speed data stream, and then the DDR3 SDRAM storage control IP core of FPGA is invoked to complete the trigger storage of big data. Finally, the command communication with the host computer is realized by CPCI standard bus, and the high-speed and large-capacity data stream upload and display are completed. Finally, through the model identification and encryption, sampling clock generation, temperature and voltage monitoring, data flow reception and trigger memory circuit test, the realization of each module is verified. Moreover, the analysis of the data collected by the host computer shows that the parameters of each FMC acquisition module, such as SNR,SFDR and input bandwidth, have reached the design requirements.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP274.2
本文编号：2443121
[Abstract]:With the rapid development of highly integrated circuits and FPGA applications, the modular architecture design of test systems has become a trend. FMC (FPGA Mezzanine Card) is a kind of interconnection interface defined specifically for FPGA. It is widely used in the design and implementation of modular data acquisition system. On the one hand, the reusability and reconfiguration between FMC modules lay the foundation for the realization of multi-function data acquisition system; on the other hand, the high-speed multi-pin characteristic of FMC interface is helpful to improve the sampling rate and bandwidth of the system. Therefore, the design of data acquisition system based on FMC modular architecture has gradually become a hot research topic at home and abroad. Based on FMC interconnection technology, four kinds of FMC acquisition modules are designed, which are FMC3028 (dual channel 3GSPS/8bits), FMC1548 (dual channel 1.5GSPS/8bits), FMC4214 (dual channel 400 MSPS/14 bits) and FMC5212 (dual channel 500 MSPS/12 bits);). At the same time, a data processing board compatible with these four acquisition modules is designed. The communication between the module and the board is controlled by the interface logic of the board FPGA on the basis of physical interconnection. Its different combination mode can realize the data acquisition system with different functions and characteristics, which is suitable for all kinds of high-speed and high-precision acquisition occasions, and has high bandwidth. The compatibility interface logic design of FMC acquisition module is divided into three general functional circuits: model identification and encryption circuit, sampling clock generation circuit and temperature and voltage monitoring circuit. Among them, the main function of model identification and encryption circuit acquisition is to identify the type of FMC acquisition module and protect the intellectual property rights of the system design; The main function of the sampling clock generation circuit is to configure the sampling clock parameters through the SPI bus to generate the corresponding clock to supply the ADC to complete the analog-to-digital conversion. The main function of the temperature and voltage monitoring circuit is to collect the temperature and voltage of the module board and transmit the data to the upper computer in time for display and analysis. In the aspect of data flow control of the board, firstly, the ChipSync technology is used to receive and process the parallel high-speed data stream, and then the DDR3 SDRAM storage control IP core of FPGA is invoked to complete the trigger storage of big data. Finally, the command communication with the host computer is realized by CPCI standard bus, and the high-speed and large-capacity data stream upload and display are completed. Finally, through the model identification and encryption, sampling clock generation, temperature and voltage monitoring, data flow reception and trigger memory circuit test, the realization of each module is verified. Moreover, the analysis of the data collected by the host computer shows that the parameters of each FMC acquisition module, such as SNR,SFDR and input bandwidth, have reached the design requirements.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP274.2
【参考文献】
相关硕士学位论文 前1条
1 黄步岐;具有可重构特征的数据采集与重放系统设计[D];电子科技大学;2011年
，本文编号：2443121
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