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压缩感知水下成像算法研究与系统设计

发布时间:2018-09-04 14:04
【摘要】:水下声学成像是进行水下探测的重要方法之一,相比于光学成像等其他方式的成像,具有成像距离远、环境适应性好等优点。以往的水下成像中一般使用较为成熟延时叠加等成像算法,并采用大规模的分立元器件和较多的传感器阵元,这样的设计方式系统运算量大,硬件系统复杂不便于移植和修改,传感器基阵较大。文中探索了应用于稀疏基阵水下正视成像的压缩感知方法,根据数字化的思想利用FPGA作为硬件系统的主控芯片,设计了水下成像系统。文中选取线性调频信号作为发射信号,分析了水下成像场景的稀疏性,根据发射信号和目标作用产生的回波信号的特点设计了字典对回波信号进行了稀疏表示。利用自适应的块贝叶斯恢复方法对回波信号中的场景系数进行恢复,相比于传统的成像算法对回波信号的数据量需求较少,可以在不同的信噪比下得出较好的结果。本文设计并实现了一种基于FPGA和USB的水下成像硬件控制采集系统。利用FPGA作为电路的主控芯片,使用Verilog HDL和原理图相结合的编程方式,完成了 AD采样控制、SRAM存储、USB通信控制、数据解码等功能,通过Modelsim对所设计的程序进行了仿真测试。电路和上位机间使用USB通信方式,通过对芯片cyc68013中的51单片机核进行C语言编程控制实现。仿真结果表明在文中所设计的字典下用自适应的块贝叶斯的方法能够得到水下目标的几何结构,FPGA和USB编程各模块仿真测试符合要求,硬件系统能在FPGA控制下有效工作并和上位机进行通信。
[Abstract]:Underwater acoustic imaging is one of the important methods for underwater detection. Compared with other imaging methods such as optical imaging, underwater acoustic imaging has the advantages of long imaging distance and good environmental adaptability. In the past underwater imaging generally used more mature imaging algorithms such as delay superposition, and used large scale discrete components and more sensor array elements. This design method has a large amount of calculation and complex hardware system is not easy to transplant and modify. The sensor array is large. In this paper, the compression sensing method applied to sparse array underwater emmetropia imaging is explored. According to the idea of digitization, the underwater imaging system is designed using FPGA as the main control chip of the hardware system. In this paper, the linear frequency modulation (LFM) signal is selected as the transmitting signal, and the sparsity of underwater imaging scene is analyzed. According to the characteristics of the transmitted signal and the echo signal generated by the target action, a dictionary is designed to represent the echo signal sparsely. The adaptive block Bayesian restoration method is used to recover the scene coefficients of echo signal. Compared with the traditional imaging algorithm, the data volume of echo signal is less, and better results can be obtained under different SNR. In this paper, a hardware control acquisition system for underwater imaging based on FPGA and USB is designed and implemented. By using FPGA as the main control chip of the circuit and the programming method of combining Verilog HDL with schematic diagram, the functions of AD sampling control, FPGA storage, communication control and data decoding are completed. The designed program is simulated and tested by Modelsim. The communication mode of USB is used between the circuit and the host computer. The 51 MCU core of the chip cyc68013 is controlled by C language programming. The simulation results show that the geometric structure of underwater target can be obtained by using the adaptive block Bayes method in the dictionary designed in this paper. The simulation tests of the modules of FPGA and USB programming meet the requirements. The hardware system can work effectively under the control of FPGA and communicate with the host computer.
【学位授予单位】:南京信息工程大学
【学位级别】:硕士
【学位授予年份】:2017
【分类号】:TP391.41;TB56

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