基于VHDL的FPGA新实验开发——简易处理器实现

发布时间：2018-04-10 04:12

本文选题：FPGA　切入点：VHDL　出处：《实验室研究与探索》2013年11期

【摘要】：针对FPGA课程实践性强、设计性要求高的特点,通过引入暑期短学期集中培训的方式,尽量压缩理论课堂教学时间,充分给予学生实验室动手实践机会,同时结合项目给定的方式开展实验课堂教学,并通过结果和过程两者相结合的评定方式,充分调动学生学习的积极性。实验过程中通过采用VHDL硬件描述语言实现能够执行相应指令的MCU内核等新实验开发,帮助学生深刻理解微处理器内部结构,特别是让其明白单片机整个系统的核心是一个由系统时钟驱动的全局状态机的逻辑过程。结果表明:该实验的展开使学生更好地掌握FPGA的设计原理、步骤和方法,精通VHDL硬件描述语言的开发和实践和深刻理解汇编指令的执行过程。
[Abstract]:In view of the characteristics of FPGA course with strong practicality and high design requirements, by introducing the way of intensive training in summer short term, we can reduce the teaching time of theoretical classroom as far as possible, so as to give the students the opportunity of hands-on practice in the laboratory.At the same time, the experimental classroom teaching is carried out in combination with the method given by the project, and the students' enthusiasm for learning is fully aroused through the evaluation of the combination of the results and the process.In the course of the experiment, the new experimental development, such as the MCU kernel which can execute the corresponding instructions, is realized by using VHDL hardware description language, which helps the students to understand the internal structure of the microprocessor deeply.In particular, let it understand that the core of the whole system is a logic process of the global state machine driven by the system clock.The results show that this experiment enables students to master the design principles, steps and methods of FPGA, to master the development and practice of VHDL hardware description language and to understand the execution process of assembly instructions.
【作者单位】：浙江大学电气工程学院;
【基金】：浙江省教育厅科研资助项目(Y2101224777)
【分类号】：TN791-4;G642

【参考文献】