基于FPGA的车辆流量检测系统

发布时间：2018-01-24 09:56

本文关键词： FPGA 车辆检测硬件设计模糊控制 STM32F107　出处：《华北电力大学》2015年硕士论文　论文类型：学位论文

【摘要】：交通堵塞以及交通事故已经成为当今各大城市面临的交通难题,制约着城市建设和经济的发展。为了能够高效的对交通进行管理,由通信技术、计算机技术及视频监控等多种科技相结合的智能交通管理系统被广泛应用。而对于车辆流量的检测是整个系统的信息来源,检测的准确与否将直接影响下一步的图像处理及车辆信息的采集。本文提出了一种改善城市交叉口交通拥堵现象的智能检测车辆流量的交通系统。主要完成视频采集交通信息、中值滤波及边缘检测算法计算车辆的排队长度、模糊控制实时改变信号灯相位以及以太网实时通讯等功能。本论文主要包括以下内容:(1)介绍了智能交通的研究背景和国内外研究状况,主要包括车辆检测在智能交通领域的发展和目前几种主流车辆检测算法,提出基于FPGA的视频车辆检测方案。(2)熟悉Cyclone III系列FPGA芯片硬件设计,确定系统硬件设计方案并完成整个系统的硬件设计,包括FPGA核心控制板、视频图像处理设计、基于STM32F107的模糊控制以太网通讯模块以及USB Blaster2.0系统下载调试电路设计。(3)完成各个模块程序编写与调试,从FPGA控制视频图像芯片完成图像采集与处理到采用STM32F107作为控制器核心处理器实现以太网信号控制的通讯功能以及模糊控制实时控制交通相位,达到交通控制从线到网的信息互通,突出了智能整体的思想。
[Abstract]:Traffic jams and traffic accidents have become the traffic problems faced by the major cities, restricting the urban construction and economic development. In order to efficiently manage the traffic, communications technology. Intelligent Traffic Management system, which combines computer technology and video surveillance, is widely used, and the detection of vehicle flow is the information source of the whole system. The accuracy of detection will directly affect the next step of image processing and vehicle information collection. In this paper, an intelligent traffic system to improve traffic congestion in urban intersections is proposed. Collect traffic information. Median filter and edge detection algorithm calculate the queue length of vehicle. Fuzzy control real-time change signal phase and Ethernet real-time communication functions. This paper mainly includes the following content: 1) introduce the research background and research status of intelligent transportation at home and abroad. It mainly includes the development of vehicle detection in the field of intelligent transportation and several mainstream vehicle detection algorithms. This paper presents a video vehicle detection scheme based on FPGA. It is familiar with the hardware design of Cyclone III series FPGA chip, determines the hardware design scheme of the system and completes the hardware design of the whole system. Including FPGA core control board, video image processing design. Fuzzy control Ethernet communication module based on STM32F107 and USB Blaster2.0 system download debugging circuit design. From image acquisition and processing by FPGA control video image chip to communication function of Ethernet signal control using STM32F107 as the core processor and real-time traffic control by fuzzy control. Phase. To achieve traffic control from the line to the network of information exchange, highlighted the idea of intelligent whole.
【学位授予单位】：华北电力大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：U495;TP391.41

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