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微电网互联变流器控制算法模型及逻辑节点设计

发布时间:2018-08-18 19:53
【摘要】:随着电力电子技术,,分布式电源技术和微电网技术的发展与日趋成熟,微电网供电质量、微电网控制技术、多微网间能源调度等问题的研究越来越多。微电网供电可靠性和灵活性方面的研究主要集中在微电网中分布式电源变流器的控制问题上,控制策略及其控制算法成为研究的关键。同时,随着IEC61850标准应用范围的不断扩展,微电网中电力电子器件及其控制器的互操作性越来越成为一种发展需求。将信息通信技术与微电网技术相结合,对智能电网的探索与建设具有重大意义。本文针对微电网互联实例,结合IEC61850标准,对变流器控制算法进行研究。全文内容可分为两个部分: (1)信息建模与逻辑节点设计是实现设备互操作的重要基础和必要前提。本文以微电网互联变流器为例,分析了变流装置的3种常用的控制策略及PQ控制算法的设计过程及电流控制环的设计,并得出相应的PQ控制算法结构图。根据该控制算法结构图,设计了控制算法的信息交互模型,并分析了信息流的具体交互过程。详细设计了模型内的功能逻辑节点FPID和FSPT,算术逻辑节点FOPE0、FOPE1和FOPE2,以及换相逻辑节点FABD和FDQA,而逻辑节点的设计包括输入输出端口设计和节点内部的算法实现框图设计,且所有的逻辑节点都为实例化设计,逻辑节点之间都是相互关联的。然后设计了软件锁相环模块、电流控制模块、功率控制模块,并分析了上述模块与逻辑节点的关系。最后,在MATLAB/SIMULINK平台上搭建了整个PQ控制仿真模型,仿真验证了电压锁相、电流跟随、有功无功功率跟随等功能,并指出了仿真波形与逻辑节点之间的关系。 (2)逻辑节点的设计可以应用于其它实例。根据上述逻辑节点的设计方法,结合IEC61499标准,以变电站母联间隔闭锁为例,通过IEC61850模型与IEC61499模型的具体映射,设计了一种基于IEC61850/61499的逻辑功能块,该功能块具有互操作性、可配置性和可重用性。文中主要介绍了闭锁逻辑功能块CILO_FB和控制逻辑功能块CSWI_FB,详细设计了功能块内部的状态机及其算法,并验证了功能块的正确性,同时,也便于整个母联间隔闭锁系统的设计。最后在FBDK平台上设计了该闭锁系统并仿真验证了系统的正确性。
[Abstract]:With the development and maturity of power electronics technology, distributed generation technology and microgrid technology, more and more research on the power supply quality, microgrid control technology and energy dispatch among multi-microgrid has been carried out. The research on the reliability and flexibility of microgrid power supply is mainly focused on the control problem of distributed power converter in microgrid. The control strategy and its control algorithm become the key to the research. At the same time, with the continuous expansion of IEC61850 standard application, the interoperability of power electronic devices and their controllers in microgrid becomes more and more a development requirement. The combination of information communication technology and microgrid technology is of great significance to the exploration and construction of smart grid. In this paper, the control algorithm of converter is studied based on the IEC61850 standard and the example of microgrid interconnection. The content of this paper can be divided into two parts: (1) Information modeling and logical node design are the important foundation and prerequisite for the implementation of device interoperability. Taking the microgrid interconnected converter as an example, this paper analyzes three common control strategies of the converter, the design process of the PQ control algorithm and the design of the current control loop, and obtains the corresponding PQ control algorithm structure diagram. According to the structure diagram of the control algorithm, the information interaction model of the control algorithm is designed, and the specific interactive process of the information flow is analyzed. The functional logic nodes FPID and FSPT in the model, the arithmetic logic nodes FOPE0 / FOPE1 and FOPE2, and the commutation logic nodes, FABD and FDQA, are designed in detail. The design of logic nodes includes the design of input and output ports and the block diagram of algorithm implementation within the nodes. All logical nodes are instantiated, and the logical nodes are interrelated. Then the software phase-locked loop module, current control module and power control module are designed, and the relationship between the above modules and logic nodes is analyzed. Finally, the simulation model of PQ control is built on MATLAB/SIMULINK platform. The simulation verifies the functions of voltage phase locking, current following, active power and reactive power following, etc. The relationship between simulation waveform and logic node is pointed out. (2) the design of logic node can be applied to other examples. According to the design method of the above logic nodes, combined with the IEC61499 standard, taking substation bus interlock as an example, a logic function block based on IEC61850/61499 is designed through the specific mapping between IEC61850 model and IEC61499 model, and the function block is interoperable. Configurable and reusable. This paper mainly introduces CILO_FB and CSWIFB, designs the state machine and its algorithm in detail, and verifies the correctness of the function block. At the same time, it is convenient to design the whole bus interlocking system. Finally, the locking system is designed on FBDK platform and the correctness of the system is verified by simulation.
【学位授予单位】:湘潭大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TM46

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