具有存储功能的噪声信号采集压缩装置设计与实现

发布时间：2018-02-07 12:46

本文关键词： 信息冗余噪声信号无损压缩 FPGA DSP　出处：《中北大学》2016年硕士论文　论文类型：学位论文

【摘要】：随着航天遥测系统的日臻完善,测量参数类型越来越多,数据量越来越大,这对于遥测无线信道的数据传输能力是个极大地挑战。据研究分析,遥测参数的信息量有高达95%的信息冗余。因此,在传输或者存储遥测数据时,可以先去除多余的信息量,从而大大提高传输和存储效率。本文针对某型号运载火箭遥测系统的研制需求,设计了一种具有存储功能的噪声信号压缩装置,可以实时采集四路噪声信号。噪声信号属于遥测速变参数的一种,对于分析箭体的力学特性具有重要影响。在对噪声特性的研究基础上,本文使用了算术编码算法来进行数据的无损压缩,数据分组长度设为2048字节。整个装置由主控板、存储板以及电源板三部分组成。主控板采用了FPGA+DSP的双控制器架构,主要功能包括四路噪声信号采集、数据压缩、数据存储以及数据回传。存储板通过高温导线与主控板连接,负责数据的存储与回收,封装时对其进行了特殊的抗冲击防护。本文以采样得到的数据流为主线,介绍了数据流所经过模块的硬件设计以及逻辑设计;针对数据流在各模块之间传输的速率匹配问题,设计了多个缓存模块;采用预设初值的方式,巧妙设计了多路量化数据在DSP内的分时调度;利用多通道缓冲串口进行数据流的低速率传输,确保其传输可靠性;对于数据流的存储,采用了双平面交叉访问模式,最大程度的提高了其写入速度。本文最后介绍了对该装置进行的相关系统测试方案,结果表明,该系统达到了预期功能指标以及可靠性要求。
[Abstract]:With the improvement of space telemetry system, more and more types of measurement parameters and large amount of data have been measured, which is a great challenge to the data transmission ability of telemetry wireless channel. The amount of information in telemetry parameters is as high as 95%. Therefore, when you transmit or store telemetry data, you can first remove the excess information. In order to greatly improve the transmission and storage efficiency, a noise signal compression device with storage function is designed in this paper to meet the development requirements of a certain type of carrier rocket telemetry system. Four noise signals can be collected in real time. The noise signal is a kind of telemetry speed variable parameter, which has an important effect on the analysis of the mechanical characteristics of the arrow. In this paper, the arithmetic coding algorithm is used for lossless compression of data. The data packet length is set to 2048 bytes. The whole device is composed of main control board, memory board and power supply board. The main control board adopts FPGA DSP dual controller architecture. The main functions include four channels of noise signal acquisition, data compression, data storage and data transmission. The storage board is connected to the main control board through a high temperature wire, which is responsible for the storage and recovery of data. In this paper, the hardware design and logic design of the data stream are introduced, and the rate matching problem of the data stream transmission between the modules is discussed, which is based on the sampled data stream as the main line, the hardware design and logic design of the module are introduced in this paper. Several buffer modules are designed; the time-sharing scheduling of multi-channel quantization data in DSP is skillfully designed by the way of preset initial value; the low rate transmission of data stream is carried out by using multi-channel buffer serial port to ensure its transmission reliability. For data stream storage, biplane cross access mode is used to improve the write speed to the maximum extent. Finally, this paper introduces the related system test scheme of the device, the results show that, The system achieves the expected function index and reliability requirement.
【学位授予单位】：中北大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：V556.1

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