高速CAM抗软错误设计与实现

发布时间：2018-02-02 12:14

本文关键词： 按内容寻址存储器软错误汉明距离匹配线校验位　出处：《大连理工大学》2014年硕士论文　论文类型：学位论文

【摘要】：CAM,即按内容寻址存储器,它一方面拥有传统存储器的读写功能,另一方面它具有自身所独有的并行高速搜索功能。它可以在一个周期内得出搜索结果,比其他基于硬件的和基于软件的搜索方案速度都要快,因此被广泛地用于高速数据搜索的应用中,如路由器中的查找表、数据压缩、图像处理等。但是,随着网络技术的飞速发展,网络流量每年至少要翻一番,光纤技术的发展、新特性网络应用的出现也要求路由器对数据包的处理、转发速度不断提高,因此高速CAM的研究变得越来越重要。另外,占CAM大部分面积的存储单元易受a粒子和中子的辐射发生软错误。又由于CAM工作时所有的字电路同时启动,大量匹配线的同时开关引起很大的地线反弹噪声从而降低了电路的操作电压,因此CAM的抗软错误能力相比普通存储器更低。同时,随着集成电路制造工艺的发展,晶体管的尺寸越来越小,导致存储单元对粒子辐射更加敏感。因此,CAM的抗软错误研究也变得越来越紧迫。鉴于此,本文提出了一种高速、抗一位软错误的CAM方案。首先本方案采用的是基于电荷重利用的下匹配线敏感方案,其特点为速度快、功耗低、并且搜索速度随失配位数的增加而加快,特别适合抗软错误电路设计；其次,每个CAM字增加了校验码单元,增加后码字间最小汉明距离增大。对于CAM来讲,这意味着原码的一位失配变为多位失配,由匹配线特点可知增加校验码后CAM搜索速度加快；另外,由于码间汉明距离增大,匹配字和失配字在发生一位软错误时的情况会区分开来,本方案使用一个Dummy CAM字的敏感输出作为控制信号,实现了抵抗一位软错误。基于本方案思想,文中在130nm1.2V标准CMOS工艺下实现了一个64W×153Bit的CAM,153位中,9位为校验码。其搜索速度为0.7ns,匹配线功耗为0.97fJ/bit/Search。汉明编码器导致的面积增加为773.7umx83.6um,存储校验码的CAM单元导致的面积增加为5.8%。
[Abstract]:On the one hand, it has the function of reading and writing of traditional memory, on the other hand, it has its own unique parallel high-speed search function, it can get the search results in a period. Faster than other hardware-based and software-based search schemes, it is widely used in high-speed data search applications, such as lookup tables in routers, data compression, image processing, etc. With the rapid development of network technology, network traffic must at least double every year. With the development of optical fiber technology, the emergence of new characteristics of network applications also requires routers to deal with data packets, forwarding speed continues to improve. So the research of high-speed CAM becomes more and more important. In addition, memory cells that account for most of the CAM area are vulnerable to soft errors due to radiation from particles a and neutrons, and because all word circuits in CAM work at the same time. A large number of matching lines at the same time the switch caused a lot of ground line rebound noise, thus reducing the circuit operating voltage, so the CAM has lower anti-soft error ability than the ordinary memory. At the same time. With the development of integrated circuit manufacturing technology, the size of transistor becomes smaller and smaller, which makes memory cell more sensitive to particle radiation, so the research of anti-soft error in CAM becomes more and more urgent. In view of this, this paper proposes a high speed, one bit soft error resistant CAM scheme. Firstly, this scheme uses a lower matching line sensitive scheme based on charge reuse, which is characterized by high speed and low power consumption. And the search speed is accelerated with the increase of the mismatch bit, which is especially suitable for the design of anti-soft error circuit. Secondly, each CAM word adds a check code unit, which increases the minimum hamming distance between code words. For CAM, this means that one bit mismatch of the original code becomes multi-bit mismatch. According to the characteristic of matching line, the speed of CAM search is quickened by adding check code. In addition, due to the increase of the hamming distance between codes, the matching word and the mismatch word will be distinguished when a bit soft error occurs. In this scheme, the sensitive output of a Dummy CAM word is used as the control signal. Implemented to resist a soft error. Based on the idea of this scheme, a 64W 脳 153Bit CAM-153 bit is implemented in 130nm 1.2V standard CMOS process. The search speed is 0.7 ns. The power consumption of the matching line is 0.97fJ / bit / Search. the hamming encoder increases the area to 773.7umx83.6um. The CAM unit that stores the check code increases the area to 5.8.
【学位授予单位】：大连理工大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP333

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