基于USB3.0的高速数据传输系统关键技术研究

发布时间：2018-02-25 02:00

本文关键词： 新概念动态测试高速数据传输信号完整性电源完整性　出处：《中北大学》2014年硕士论文　论文类型：学位论文

【摘要】：微机技术和信号处理技术的飞速发展带动了高速数据传输技术的革命性飞跃。USB总线技术已经有了量及的变化，传输速率从刚出现时的1.2Mb/s到现在的5Gb/s，仅仅用了二十年的时间，与此同时，这样的飞跃性发展，还表现在电源管理能力的提升，资源配置的人性化过程等方面。新概念动态测试的出现，对存储测试技术在存储容量及传输速率方面都提出了更高的要求，技术成熟的USB二代产品USB2.0数据传输接口已经无法满足测试需求，基于USB3.0的高速数据传输系统应运而生。现阶段，实验室在USB2.0的基础上，基于USB3.0的高速数据传输系统的研究已经进入了设计阶段。但是，在一些关键问题的处理上还存在一定问题。如：驱动程序的开发、接口与FPGA的通信、高速PCB板的信号和电源完整性问题等。为了解决这些关键问题，，本文在撰写过程中，不是简单的进行一些开发板的调试工作，而是利用Cadence软件成功绘制系统的原理图及PCB图，并进行仿真，解决窜扰、反射、电源完整性等问题。围绕课题研究的目的，本文主要做了以下几方面的工作： 1．总结了USB2.0接口在应用中遇到的几个关键问题，提出了较为有效的解决方法，并进行了仿真验证； 2．分析对比了几种高速接口的性能，总结了USB3.0接口技术的几个优势，提出了较为可行的设计方案，绘制了系统的原理框图； 3．利用Cadence软件对高速数据传输系统硬件原理图进行了完善，实现了与FPGA及DDR2的互联。在认真学习了高速PCB设计方法的基础上，针对信号反射、信号窜扰、差分线设计、电源完整性几个常见问题，进行了具体的仿真，并提出了有效的设计方法，完成了高速数据传输系统的PCB设计工作； 4．对系统的固件程序及FPGA逻辑控制时序进行了设计仿真。在GPIF II接口工作在SLAVE FIFO模式下，对固件框架进行了改进，并实现了与FPGA的通信。 5．完成了系统的硬件、速度、传输方向等测试工作，验证了系统的可行性。
[Abstract]:The rapid development of microcomputer technology and signal processing technology has led to a revolutionary leap in high-speed data transmission technology. USB bus technology has changed in quantity and quantity. The transmission rate has changed from 1.2 Mb / s when it first appeared to 5 GB / s at present, in only 20 years. At the same time, such a leap-forward development, but also in the improvement of power management capacity, the allocation of resources in the process of humanization, and so on. With the emergence of new concept dynamic testing, the storage testing technology has put forward higher requirements in storage capacity and transmission rate. The mature USB second-generation USB2.0 data transmission interface has been unable to meet the test requirements. High-speed data transmission system based on USB3.0 came into being. At present, the research of high-speed data transmission system based on USB3.0 based on USB2.0 in laboratory has entered the stage of design. There are still some problems in dealing with some key problems, such as the development of driver, the communication between interface and FPGA, the signal and power integrity of high speed PCB board, etc. In order to solve these key problems, in the process of writing, Not simply debugging some development boards, but using Cadence software to draw the schematic diagram and PCB diagram of the system successfully, and carry on the simulation to solve the problems of crosstalk, reflection, power integrity and so on. The main work of this paper is as follows:. 1. Several key problems encountered in the application of USB2.0 interface are summarized, and some effective solutions are put forward and verified by simulation. 2. The performance of several high-speed interfaces is analyzed and compared, several advantages of USB3.0 interface technology are summarized, a more feasible design scheme is put forward, and the principle block diagram of the system is drawn. 3. The hardware schematic diagram of high speed data transmission system is perfected by using Cadence software, and the interconnection with FPGA and DDR2 is realized. On the basis of studying the design method of high speed PCB, the signal reflection, signal channeling and differential line are designed. Several common problems of power supply integrity have been simulated and an effective design method has been put forward. The PCB design of high-speed data transmission system has been completed. 4. The firmware program of the system and the timing of FPGA logic control are designed and simulated. The firmware framework is improved in SLAVE FIFO mode with the interface of GPIF II, and the communication with FPGA is realized. 5. The hardware, speed and transmission direction of the system are tested, and the feasibility of the system is verified.
【学位授予单位】：中北大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP334.7

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