众核处理器中动态可重构Cache一致性协议的研究与实现

发布时间：2018-03-18 16:06

本文选题：众核处理器　切入点：Cache一致性　出处：《上海交通大学》2013年硕士论文　论文类型：学位论文

【摘要】：随着集成电路技术的进步和处理器体系结构技术的发展，众核处理器已经成为未来微处理器的一个重要发展方向，是当前学术界和工业界的研究热点。由于处理器核数众多，，如何利用庞大的计算资源，解决核数增加带来的存储器瓶颈，应对任务的动态、阶段性资源需求是众核处理器需要解决的重大问题。论文涉及的主要工作有：1）提出动态子网划分的方案处理众核处理器遇到的资源利用问题和动态资源需求问题。2）为支持动态子网划分的方案，设计基于Token的动态可重构的Cache一致性协议。3）在Gem5仿真器中实现基于Token的动态可重构的Cache一致性协议并进行验证。在本课题动态子网划分的环境中，基于Token的动态可重构Cache一致性协议将在程序执行时间、网络通信代价等主要性能指标上优于目录协议和Token协议。实验结果显示，在16核Mesh网络中，基于Token的动态可重构Cache一致性协议在程序执行时间上比Token协议降低10%，而通信代价比目录协议降低30%以上。鉴于这一结果，基于Token的动态可重构Cache一致性协议将能够有效的应用到众核处理器结构中。
[Abstract]:With the progress of integrated circuit technology and the development of processor architecture technology, multicore processor has become an important development direction of microprocessor in the future. How to make use of the huge computing resources to solve the memory bottleneck caused by the increasing number of cores and to deal with the dynamic of the task are the major problems that need to be solved by the multi-core processor. The main work involved in this paper is: (1) A scheme of dynamic subnet partitioning is proposed to deal with the resource utilization problem and dynamic resource requirement problem encountered by multi-core processors. A dynamic reconfigurable Cache consistency protocol based on Token. 3) is designed to implement and verify the dynamically reconfigurable Cache consistency protocol based on Token in the Gem5 simulator. In the dynamic subnet partition environment, the dynamic reconfigurable Cache consistency protocol based on Token will outperform directory protocol and Token protocol in the main performance indexes such as program execution time, network communication cost and so on. In 16-core Mesh networks, the dynamic reconfigurable Cache conformance protocol based on Token reduces the program execution time by 10 times, while the communication cost is more than 30% lower than that of the directory protocol. Dynamic reconfigurable Cache conformance protocol based on Token can be effectively applied to multi-core processor architecture.
【学位授予单位】：上海交通大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP332

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