基于二极管单元的高密度掩模ROM设计

发布时间：2018-03-23 15:18

本文选题：掩模只读存储器　切入点：二极管阵列　出处：《电子与信息学报》2017年06期

【摘要】：针对传统ROM(Read-Only Memory)存储密度低、功耗高的问题,该文提出一种采用二极管单元并通过接触孔编程来存储数据的掩模ROM。二极管阵列采用双沟槽隔离工艺和无间隙接触孔连接方式实现了极高的存储密度。基于此设计了一款容量为2 Mb的掩模ROM,包含8个256 kb的子阵列。二极管阵列采用40 nm设计规则,外围逻辑电路采用2.5 V CMOS工艺完成设计。二极管单元的有效面积仅为0.017μm~2,存储密度高达0.0268mm~2/Mb。测试结果显示二极管单元具备良好的单元特性,在2.5 V电压下2 Mb ROM的比特良率达到了99.8%。
[Abstract]:Aiming at the problem of low storage density and high power consumption in traditional ROM(Read-Only memory, In this paper, a mask ROM is proposed, which uses diode unit and programming through contact hole to store data. Diode array realizes extremely high storage density by double groove isolation and non-gap contact hole connection. A 2 Mb mask ROM with 8 256kb subarrays is presented. The diode array adopts a 40nm design rule. The peripheral logic circuit is designed by 2.5V CMOS process. The effective area of the diode cell is only 0.017 渭 m / 2, and the storage density is up to 0.0268mm / 2 / Mb.The test results show that the diode unit has good cell characteristics, and the bit yield of 2 Mb ROM is 99.8% at 2.5 V voltage.
【作者单位】：中国科学院上海微系统与信息技术研究所;上海新储集成电路有限公司;
【基金】：中国科学院战略性先导科技专项(XDA09020402) 国家重点基础研究发展计划(2013CBA01904,2013CBA01900,2010CB 934300,2011CBA00607,2011CB932804) 国家集成电路重大专项(2009ZX02023-003) 国家自然科学基金(61076121,61176122,61106001,61261160500,61376006)~~
【分类号】：TP333.7

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