安全密钥SOC芯片USB1.1控制器设计

发布时间：2018-04-08 07:17

本文选题：USB1.1　切入点：验证　出处：《西安电子科技大学》2014年硕士论文

【摘要】：USB技术现已被广泛应用。本文综合了对SOC设计的理解和对USB接口通信协议的分析，给出USB1.1控制器的设计方案，具有较高的实用价值。该芯片已经应用于加密U-Key并向各公司提供使用。本文从SOC安全芯片的意义出发，以设计USB1.1设备控制器为目标，分别对设计中出现的问题给出解决方案。通过对采样得到的信号同步化，并根据相位检测及沿检测两个信号得到接收数据时所用时钟，实现接收时钟的萃取。参考USB2.0给出的UTMI信号流程，用状态机实现对包及标识符的解码、标志信号生成和发送，并检测总线上信号，实现对当前端点是否空闲或Halt等的判定，以确认USB系统是否进入低功耗模式。在整个设计对RAM的连接关系上，主要是考虑USB重发机制的影响，，需使当前地址暂存一个周期，在对数据进行确认之后才更新当前地址，确保数据接收及发送地址无误。并通过搭建验证平台对USB进行系统仿真，来保证设计的正确性，结合CV测试来确认设计的完备性。验证结果表明，本文给出的USB1.1设备控制器设计能够正常解析USB1.1所支持的USB包，通过0端完成设备的枚举及各端点的地址分配，并能正常进行Bulk、Control、Interrupt传输。此外，除去文中MLBI模块，剩余模块所完成的功能及预留出的接口可以正常的完成其作为USB1.1设备控制器IP的应用，能够集成到SOC系统当中。
[Abstract]:USB technology has been widely applied now. This paper synthesizes the understanding of SOC design and the analysis of USB interface communication protocol, and gives the design scheme of USB1.1 controller, which has high practical value. The chip has been applied in encrypting U-Key and provides it to all companies.
This article from the meaning of the SOC security chip, the design of USB1.1 device controller as the goal, are the problems in the design are given solutions. Through the synchronization of signal sampling, and according to the data obtained by the receiving clock phase detection and edge detection of two signals, realize the extraction of the receive clock UTMI signal. Process reference given by USB2.0, and the decoding of packet identifier using state machine, signal generation and transmission, and detection of the bus signal, determine whether the current endpoint of idle or Halt, to confirm whether the USB system into a low power mode. In the connection between the whole design of RAM, mainly considering the effect of the USB retransmission mechanism, the current need to address temporary one cycle, to update the current address in the data are confirmed, ensure the data receiving and sending address is correct. And through the build verification level The platform makes a systematic simulation of the USB to ensure the correctness of the design and to confirm the completeness of the design with the CV test.
The verification results show that the design of USB1.1 device controller is presented in this paper can support the normal analytical USB1.1 USB package, address distribution equipment and the enumeration is accomplished by 0 end points, and the normal Bulk, Control, Interrupt transmission. In addition, the removal of the MLBI module, the remaining module completed function and interface is reserved the normal completion of its application as a USB1.1 device controller IP, can be integrated into the SOC system.

【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP334.7

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