利用Stencil建模及评估Intel IMCI vgather指令

发布时间：2018-06-21 01:34

本文选题：性能建模 + vgather　；参考：《计算机工程与科学》2016年09期

【摘要】：Intel Xeon Phi协处理器的指令集IMCI引入了硬件实现的vgather指令,旨在帮助512位SIMD寄存器访问非连续内存地址上的数据。然而实验结果显示,vgather很有可能成为应用在Xeon Phi协处理器上关键的性能瓶颈之一。基于以上结论,针对vgather的性能建模可以帮助用户深入地掌握和理解Xeon Phi协处理器的性能特性。在实验方法上,本文方法与现存的通过程序段内嵌入汇编代码进行数据统计不同,使用PAPI等性能分析工具直接收集硬件计数器的统计结果,作为模型的实验数据。本文的性能模型基于AGI事件次数和根据VPU_DATA_READ次数估算得出的vgather所导致的平均延迟构建而成。该模型能够对Xeon Phi应用代码中由vgather所导致的总延迟进行预测。最终,为了验证模型预测的准确性,将该模型应用在三维7点stencil应用代码上,预测结果显示,vgather耗时占计算总耗时的约40%。再将该结果与利用intrinsics指令去除vgather后的计算耗时进行了对比验证,结果显示模型预测准确。基于上述结论,采用硬件计数器的统计结果在Xeon Phi协处理器上针对vgather构建了性能模型。同时,通过与其他平台的vgather对比,认为该模型也可以应用在同样具备vgather的Intel CPU处理器平台上。
[Abstract]:The instruction set IMCI of Intel Xeon Phi coprocessor introduces hardware-implemented vgather instructions to help 512-bit SIMD registers access data on discontinuous memory addresses. However, the experimental results show that Vgather may become one of the key performance bottlenecks in Xeon Phi coprocessor. Based on the above conclusions, the performance modeling of vgather can help users to grasp and understand the performance characteristics of Xeon Phi coprocessor. In the experimental method, the method in this paper is different from the existing data statistics through embedded assembly code in the program segment. The performance analysis tools such as API are used to collect the statistical results of the hardware counter directly as the experimental data of the model. The performance model of this paper is based on the average delay caused by the number of vgather events and the estimated number of vgather events. The model can predict the total delay caused by vgather in Xeon Phi application code. Finally, in order to verify the accuracy of the model prediction, the model is applied to 3D 7-point stencil application code. The prediction results show that the time consuming of the model is about 40% of the total calculation time. The results are compared with the calculation time after vgather removal by intrinsics instruction, and the results show that the model is accurate. Based on the above conclusion, the performance model of vgather is built on Xeon Phi coprocessor with the statistical results of hardware counter. At the same time, compared with other vgather platforms, the model can also be applied to Intel processor platforms with vgather.
【作者单位】：上海交通大学高性能计算中心;东京工业大学;Intel公司;
【基金】：国家863计划(2014AA01A302) 日本学术振兴会RONPAKU Fellowship资助
【分类号】：TP332

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