基于堆栈式多核处理器的嵌入式系统的研究与实现

发布时间：2018-06-22 12:29

本文选题：嵌入式系统 + 多核　；参考：《南京航空航天大学》2012年硕士论文

【摘要】：嵌入式系统领域的高速发展，给嵌入式处理器的设计带来了多方面的挑战，嵌入式系统开发已开始向高度并行化、高实时性和可扩展方向发展。堆栈式处理器具有硬件支持的堆栈、简单的硬件结构、简洁的指令集结构、快速的子程序调用能力、高度模块化的软件程序和很好的系统扩展性等特点，，很适合作为嵌入式系统领域的核心处理器。但随着嵌入式系统需求的发展，单核堆栈处理器已不能满足快速多任务处理和并行化程序的应用需求。本文针对单核堆栈处理器的劣势，设计了一种基于双核堆栈处理器的SoPC嵌入式系统。在系统设计中做了如下两方面的工作：优化单核堆栈处理器和基于双核堆栈处理器的SoPC的实现。在单核堆栈处理器优化方面，本文为单核处理器设计出能够快速单周期执行的程序分支数据路径、能够进行访存地址预生成的地址生成逻辑和基于哈佛结构的堆栈处理器存储器系统。在双核堆栈处理器SoPC设计方面，本文设计了一种基于堆栈的核间通信邮箱并使用它构建了一个双核堆栈处理器，然后基于双核堆栈处理器和Xilinx公司EDK设计了基于双核堆栈处理器的SoPC系统，并在Xilinx XC5VLX110T开发板上对系统进行了正确性验证。本文使用Verilog语言进行处理器结构描述，使用Modelsim进行功能仿真。处理器最终在Xilinx公司的XC5VLX110T FPGA开发板上实现，在该开发板上的最高时钟频率为209.8MHz，处理器性能优于其它同类处理器。双核SoPC系统经过上板测试，系统运行正常。
[Abstract]:The rapid development of embedded system has brought many challenges to the design of embedded processor. The development of embedded system has begun to be highly parallel, real-time and extensible. The stack processor has the characteristics of hardware supporting stack, simple hardware structure, simple instruction set structure, fast subroutine transfer ability, highly modularized software program and good system expansibility, etc. It is suitable for the core processor in the embedded system field. However, with the development of embedded system requirements, single core stack processors can not meet the requirements of fast multitask processing and parallelization programs. Aiming at the disadvantage of single core stack processor, a SoPC embedded system based on dual core stack processor is designed in this paper. In the system design, the following two aspects are done: optimizing the implementation of single core stack processor and SoPC based on dual core stack processor. In the aspect of single core stack processor optimization, this paper designs a program branch data path for single core processor that can execute quickly in a single cycle. Address generation logic and stack processor memory system based on Harvard architecture can be used to generate access address. In the design of dual-core stack processor SoPC, this paper designs a stack based mailbox for inter-core communication and uses it to construct a dual-core stack processor. Then a SoPC system based on dual core stack processor and Xilinx EDK is designed, and the correctness of the system is verified on Xilinx XC5VLX110T development board. In this paper, we use Verilog language to describe the processor architecture, and use Modelsim to simulate the function. The processor is finally implemented on the XC5VLX110T FPGA development board of Xilinx Company. The highest clock frequency on the board is 209.8 MHz, and the processor performance is superior to other similar processors. The dual-core SoPC system has been tested on the board and the system is running normally.
【学位授予单位】：南京航空航天大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP332

【共引文献】