基于嵌入式PC和CPLD的测试适配器设计与实现
发布时间：2018-07-15 07:37
【摘要】：嵌入式技术伴随着微处理器的诞生和发展,与计算机、微电子、网络和通信技术紧密结合。21世纪以来,高性能嵌入式系统的硬件核心是拥有32位Alpha/ARM/PowerPC/MIPS/x86等架构的SoC,其硬件平台具有强大的指令(RISC或CISC)处理能力和丰富的片上资源,可以支持Linux、VxWorks、iOS、Android等复杂的操作系统。Linux有着良好的性能,在国内外的程序员中普及率非常高,可安装在手机、平板电脑、路由器、台式机、大型机和超级计算机等各种设备中。现场可编程门阵列(FPGA)和复杂可编程逻辑器件(CPLD)主要应用于数据采集、接口逻辑、高性能数字信号处理领域等。特别是在混合电平环境里面,传统的电平转换器件实现接口会导致电路复杂性提高,利用FPGA/CPLD支持多电平共存的特性,可以大大简化设计方案。 本文设计和实现了一种基于x86架构、Linux操作系统的嵌入式PC和CPLD的测试适配器,它通过RS232串口接收并解析测试平台发出的测试命令,根据命令对PCI接口的数字图像模块(DIM)和总线接口模块(BIM)进行测试。嵌入式PC通过GPIO口模拟SPI时序控制CPLD的I/O输出,为被测模块(UUT)提供正常工作的时序；嵌入式PC通过对PCI接口的双口RAM的读写控制UUT的工作；测试平台与UUT通过总线通信,实时记录并判断测试结果。
[Abstract]:Embedded technology is accompanied by the birth and development of microprocessors, closely combined with computers, microelectronics, network and communication technology in the.21 century. The core of the hardware of high performance embedded systems is SoC with 32 bits of Alpha/ARM/PowerPC/MIPS/x86 architecture, and its hardware platform has powerful instruction (RISC or CISC) processing capability and rich tablet A complex operating system that supports Linux, VxWorks, iOS, Android and other complex operating systems,.Linux has good performance and is very popular among domestic and foreign programmers. It can be installed in various devices such as mobile phones, tablets, routers, desktops, mainframes and supercomputers. Field programmable gate array (FPGA) and complex programmable logic Devices (CPLD) are mainly used in data acquisition, interface logic, high performance digital signal processing and so on. Especially in the mixed level environment, the traditional level converter interface will lead to the improvement of the complexity of the circuit. Using FPGA/CPLD to support the characteristics of multilevel coexistence, the design scheme can be greatly simplified.
This paper designs and implements a test adapter for embedded PC and CPLD based on x86 architecture and Linux operating system. It receives and parses test commands issued by the test platform through the RS232 serial port, and tests the PCI interface's digital image module (DIM) and the bus interface module (BIM) based on the command. The embedded PC is used to simulate SPI by GPIO port. The order controls the I/O output of CPLD and provides the time sequence for the normal work for the measured module (UUT); embedded PC controls the work of UUT by reading and writing the dual port RAM of the PCI interface; the test platform is communicating with UUT through the bus to record and judge the test results in real time.
【学位授予单位】：华东理工大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP368.12
[Abstract]:Embedded technology is accompanied by the birth and development of microprocessors, closely combined with computers, microelectronics, network and communication technology in the.21 century. The core of the hardware of high performance embedded systems is SoC with 32 bits of Alpha/ARM/PowerPC/MIPS/x86 architecture, and its hardware platform has powerful instruction (RISC or CISC) processing capability and rich tablet A complex operating system that supports Linux, VxWorks, iOS, Android and other complex operating systems,.Linux has good performance and is very popular among domestic and foreign programmers. It can be installed in various devices such as mobile phones, tablets, routers, desktops, mainframes and supercomputers. Field programmable gate array (FPGA) and complex programmable logic Devices (CPLD) are mainly used in data acquisition, interface logic, high performance digital signal processing and so on. Especially in the mixed level environment, the traditional level converter interface will lead to the improvement of the complexity of the circuit. Using FPGA/CPLD to support the characteristics of multilevel coexistence, the design scheme can be greatly simplified.
This paper designs and implements a test adapter for embedded PC and CPLD based on x86 architecture and Linux operating system. It receives and parses test commands issued by the test platform through the RS232 serial port, and tests the PCI interface's digital image module (DIM) and the bus interface module (BIM) based on the command. The embedded PC is used to simulate SPI by GPIO port. The order controls the I/O output of CPLD and provides the time sequence for the normal work for the measured module (UUT); embedded PC controls the work of UUT by reading and writing the dual port RAM of the PCI interface; the test platform is communicating with UUT through the bus to record and judge the test results in real time.
【学位授予单位】：华东理工大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP368.12
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