车用微控制器运算和译码部件的设计与验证

发布时间：2018-07-15 07:39

【摘要】：汽车电子是现代汽车中一个发展迅猛的领域，，ECU（Electrical Control Unit）在其中扮演着非常重要的角色。为了实现汽车电子的智能化和网络化，汽车中需要集成更多的ECU。但是ECU的核心部件微控制器却被国外厂商长期垄断，这对大力发展国内的汽车工业来说是一个障碍。所以进行自主知识产权车用微控制器的设计和研发具有重要意义。在分析了车用微控制器特点的基础上，我们确定了研究目标：实现一款兼容飞思卡尔CPU12指令集的16位车用微控制器。整个微控制器核心采用了单时钟同步设计和微程序控制的总体设计方案，提高了系统的稳定性和灵活性。本文主要负责微控制器运算和译码部件的设计与验证。首先，本文提出了具有统一数据通路和快速运算模块的运算部件。提出的数据通路使用一个运算模块就可以满足一类指令的8位和16位有符号和无符号运算，避免了运算模块的重复，从而减少了部件面积。性能评估的结果表明设计的运算部件完全可以满足微控制器的要求。其次，在对所有指令结构和特征深入分析的基础上，提出了一种兼容CPU12指令集的译码方案，结合提出的高效预取机制，可以快速读入指令字节，从而加快了译码信息的产生，提高了微控制器的效率。面对复杂设计带来的验证挑战，本文对验证语言和验证方法学进行了相关研究，并搭建了基于UVM（Universal Verification Methodology）的可重用验证平台，进行了基于覆盖率和断言的模块级验证，提高了设计和验证的质量。本文设计了基于随机约束的事务级指令发生器，此发生器可有效地产生各种符合指令集格式的指令，大大减少了人工定向激励的编写。结合针对接口信号和内部状态设计的并行断言，加快了模块级的调试过程和验证收敛，实现了部件的较全面验证。最后进行了系统级的调试和FPGA原型测试。
[Abstract]:Electrical Control Unit (ECU) plays a very important role in modern automobile. In order to realize the intelligence and network of automobile electronics, more ECUs need to be integrated in automobile. However, the core component of ECU microcontroller has been monopolized by foreign manufacturers for a long time, which is an obstacle to the development of domestic automobile industry. Therefore, it is of great significance to design and develop independent intellectual property vehicle microcontrollers. On the basis of analyzing the characteristics of vehicle microcontroller, we have determined the research goal: to realize a 16-bit vehicle microcontroller compatible with Freescale CPU12 instruction set. The whole microcontroller core adopts the single clock synchronization design and the overall design scheme of microprogram control, which improves the stability and flexibility of the system. This paper is mainly responsible for the design and verification of microcontroller operation and decoding parts. First of all, this paper proposes a unified data path and fast operation module. Using one operation module, the proposed data path can satisfy the 8-bit and 16-bit signed and unsigned operations of a class of instructions, thus avoiding the repetition of the operation modules and thus reducing the area of the parts. The performance evaluation results show that the designed computing unit can fully meet the requirements of the microcontroller. Secondly, a decoding scheme compatible with CPU12 instruction set is proposed on the basis of in-depth analysis of all instruction structures and features. Combined with the proposed efficient prefetching mechanism, it can quickly read instruction bytes, thus speeding up the generation of decoding information. The efficiency of microcontroller is improved. In the face of the verification challenges brought by complex design, this paper studies the verification language and verification methodology, builds a reusable verification platform based on UVM (Universal Verification Methodology), and implements modular verification based on coverage and assertion. The quality of design and verification is improved. In this paper, a transaction level instruction generator based on random constraints is designed. This generator can effectively generate instructions in accordance with instruction set format and greatly reduce the writing of manual directional excitation. Combined with the parallel assertions designed for interface signals and internal states, the debugging process and verification convergence at the module level are accelerated, and the complete verification of the components is realized. Finally, system level debugging and FPGA prototype test are carried out.
【学位授予单位】：湖南大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP332

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