闪速存储系统中纠错编码技术研究
发布时间：2018-07-26 13:42
【摘要】：Nand Flash是目前消费性电子产品中被广泛使用的元件之一。由于Nand Flash的物理机构特点，容易发生错误，如何保证数据的可靠性，成为一项重要的研究课题。采用纠错码(Error Correction Coding,ECC)的纠错控制技术是目前提高闪存数据可靠性的关键技术之一，而BCH码和低密度校验码LDPC码(Low-DensityParity-Check codes)是目前被广泛应用在闪存上的纠错码。 本文对BCH码和LDPC码在Nand Flash上的编译码技术进行了研究，对未来高性能纠错码码纠错芯片有着重要的意义。本文的主要工作概括为： 1.概述了Nand Flash基本结构和传统的闪存存储技术，详细分析了NandFlash错误机制和错误衡量标准，并阐述了闪存的基本纠错机制。 2.深入研究了BCH编译码思想和构造方法，探讨了闪存电压概率分布，，将闪存电压状态作为BCH硬判决算法输入信息进行译码，用BCH译码算法改善闪存数据可靠性问题，并通过仿真分析了BCH码对Nand Flash可靠性的改进。 3.深入研究了LDPC码软判决最小和译码算法，该算法可以有效地利用闪存LLR信息来提高闪存系统的译码性能，通过仿真表明该算法有效的提高了闪速存储系统数据的可靠性，同时由于该算法的复杂度相对较小，对Nand Flash的读写速度也有一定程度的提高。
[Abstract]:Nand Flash is one of the widely used components in consumer electronics. Due to the characteristics of physical mechanism of Nand Flash, it is easy to make mistakes, so how to ensure the reliability of data becomes an important research topic. Error-correcting control technology using error-correcting code (Error Correction coding is one of the key technologies to improve the reliability of flash data, while BCH code and low-density check code (Low-DensityParity-Check codes) are widely used in flash memory. In this paper, the encoding and decoding techniques of BCH code and LDPC code on Nand Flash are studied, which is of great significance to the future high performance error-correcting code chip. The main work of this paper is summarized as follows: 1. This paper summarizes the basic structure of Nand Flash and traditional flash memory technology, analyzes the error mechanism and error measurement standard of NandFlash in detail, and expounds the basic error-correcting mechanism of flash memory. 2. In this paper, the idea and construction method of BCH encoding and decoding are deeply studied, and the probability distribution of flash voltage is discussed. The state of flash voltage is used as input information of BCH hard decision algorithm to decode, and BCH decoding algorithm is used to improve the reliability of flash memory data. The improvement of Nand Flash reliability by BCH code is analyzed by simulation. 3. The soft-decision minimum sum decoding algorithm for LDPC codes is studied in depth. The algorithm can effectively use flash memory LLR information to improve the decoding performance of flash memory system. The simulation results show that the algorithm can effectively improve the reliability of flash storage system data. At the same time, because the complexity of the algorithm is relatively small, the speed of reading and writing of Nand Flash is improved to a certain extent.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP333;TN911.22
本文编号：2146195
[Abstract]:Nand Flash is one of the widely used components in consumer electronics. Due to the characteristics of physical mechanism of Nand Flash, it is easy to make mistakes, so how to ensure the reliability of data becomes an important research topic. Error-correcting control technology using error-correcting code (Error Correction coding is one of the key technologies to improve the reliability of flash data, while BCH code and low-density check code (Low-DensityParity-Check codes) are widely used in flash memory. In this paper, the encoding and decoding techniques of BCH code and LDPC code on Nand Flash are studied, which is of great significance to the future high performance error-correcting code chip. The main work of this paper is summarized as follows: 1. This paper summarizes the basic structure of Nand Flash and traditional flash memory technology, analyzes the error mechanism and error measurement standard of NandFlash in detail, and expounds the basic error-correcting mechanism of flash memory. 2. In this paper, the idea and construction method of BCH encoding and decoding are deeply studied, and the probability distribution of flash voltage is discussed. The state of flash voltage is used as input information of BCH hard decision algorithm to decode, and BCH decoding algorithm is used to improve the reliability of flash memory data. The improvement of Nand Flash reliability by BCH code is analyzed by simulation. 3. The soft-decision minimum sum decoding algorithm for LDPC codes is studied in depth. The algorithm can effectively use flash memory LLR information to improve the decoding performance of flash memory system. The simulation results show that the algorithm can effectively improve the reliability of flash storage system data. At the same time, because the complexity of the algorithm is relatively small, the speed of reading and writing of Nand Flash is improved to a certain extent.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP333;TN911.22
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