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基于CPCI架构的嵌入式数据传输系统设计

发布时间:2018-07-28 07:15
【摘要】:当今科技发展日新月异,其发展速度之快令人难以置信,特别是在通讯领域,对大量数据传输的高速度、大带宽和可靠性提出了更高的要求。新型声纳系统不光在军用领域,包括民用探测方面都具有及其重要的价值和作用。而一套完整的声纳系统包括前端采集、信号处理、显示控制、存储回放等诸多部分,而如何为声纳系统提供高速、可靠的数据传输和系统互联是其研究的重点。 本文主要研究基于CPCI架构的嵌入式数据传输系统设计。根据声纳系统对数据传输的高可靠性和强实时性的要求,以及信号处理平台的拓扑结构对传输、互联的要求,存储回放设备和显示控制设备对信号再生性能的要求,有针对性的设计实现本数据传输系统。 本论文在的设计实现在一块标准加固CPCI架构的6U大小的板卡,整篇论文在基于对核心技术的研究和总结的基础之上,采用模块的设计方法,在论文中着重阐述整板的硬件设计,并且介绍支撑的软件平台、测试程序和驱动程序。本设计采用基于DSP+FPGA的处理器架构,应用高速串行传输技术和控制协议,物理通道上使用光纤传输技术,并且结合TS201芯片高速LINK通道和数字信号处理平台的拓扑结构,设计实现高速稳定数据传输和互联结构。 本论文在FPGA芯片的选择上,立足Xilinx公司的Virtex5系列的FPGA芯片,采用模块化的设计思想,分别实现PCI总线到DSP总线的转换桥逻辑设计和光纤通道控制协议的逻辑设计。在DSP芯片的选择上,则采用ADI公司的TS201DSP芯片,作为核心的数据处理芯片,.从而实现单板的数据校验和算法实现。本设计中集成了两路不同带宽的光纤通道,并且采用冗余设计的思想,每种带宽的光纤通道都有一路热备份,充分保证可靠性。 本论文在完成硬件和软件设计之后,搭建完整的硬件测试平台对设计指标进行测试,并且给出的测试结果,测试数据符合设计的最初设计指标。利用模块化的设计思想完成基于CPCI以DSP+FPGA为处理架构的光纤传输硬件板卡,相比于传统基于CPCI数据传输系统的硬件板卡:单板实现最小系统;单板具备多种带宽的光纤数据通道;硬件设计实现模块化。本应用设计的最终实现,在保证了声纳系统数据互联可靠性的前提下,大大提高了传输效率,具备很高的工程应用价值。 本文共有图41幅,表3个,参考文献32篇
[Abstract]:With the rapid development of science and technology, the speed of development is incredible, especially in the field of communication, which puts forward higher requirements for the high speed, large bandwidth and reliability of a large amount of data transmission. The new sonar system not only plays an important role in military field, but also in civil detection. A complete sonar system includes front-end acquisition, signal processing, display control, storage and playback, and how to provide high-speed, reliable data transmission and system interconnection for the sonar system is the focus of its research. This paper mainly studies the design of embedded data transmission system based on CPCI architecture. According to the requirements of the sonar system for high reliability and strong real-time performance of data transmission, as well as the requirements of the topological structure of the signal processing platform for transmission and interconnection, the requirements of the storage and playback equipment and the display control equipment for the signal regeneration performance, Targeted design and implementation of the data transmission system. The design of this paper is realized in a standard CPCI frame of 6U size card. Based on the research and summary of the core technology, this paper uses the design method of module, and emphasizes the hardware design of the whole board in this paper. The software platform, test program and driver are also introduced. This design adopts processor architecture based on DSP FPGA, applies high-speed serial transmission technology and control protocol, uses optical fiber transmission technology on physical channel, and combines the topology of TS201 chip high-speed LINK channel and digital signal processing platform. Design and implementation of high-speed and stable data transmission and interconnection structure. On the choice of FPGA chip, based on the FPGA chip of Virtex5 series of Xilinx Company, this paper adopts the modular design idea to realize the logic design of the conversion bridge from PCI bus to DSP bus and the logic design of optical fiber channel control protocol respectively. In the selection of DSP chip, ADI TS201DSP chip is used as the core data processing chip. Thus, the data checksum algorithm of single board is realized. In this design, two optical fiber channels with different bandwidth are integrated, and the redundant design is adopted. Each bandwidth fiber channel has a hot backup, which fully ensures the reliability. After the completion of hardware and software design, this paper builds a complete hardware test platform to test the design indicators, and gives the test results, the test data accord with the original design indicators. Using the modularization design idea, the optical fiber transmission hardware card based on CPCI and DSP FPGA is completed. Compared with the traditional hardware card based on CPCI data transmission system, the single board realizes the minimum system; Single board has a variety of bandwidth optical fiber data channel; hardware design to achieve modularization. The final implementation of this application design, on the premise of guaranteeing the reliability of sonar system data interconnection, greatly improves the transmission efficiency and has high engineering application value. There are 41 figures, 3 tables and 32 references in this paper.
【学位授予单位】:北京交通大学
【学位级别】:硕士
【学位授予年份】:2012
【分类号】:TN919.3;TP368.1

【参考文献】

相关期刊论文 前8条

1 童子权;白锦玲;;LVDS传输技术在高速数据采集系统中的应用[J];国外电子测量技术;2009年02期

2 邹德财;吴海涛;李云;;XILINX的FPGA芯片架构剖析[J];航空计算技术;2007年02期

3 徐嘉烨;项占琴;;模块化思想在嵌入式系统设计中的应用[J];机电工程;2007年05期

4 李琼;郭御风;刘光明;刘涛;;I/O互联技术及体系结构的研究与发展[J];计算机工程;2006年12期

5 赵肖东;邓云凯;王明芳;;基于CPCI总线的高速数据传输系统的设计[J];计算机测量与控制;2006年11期

6 王明芳;邓云凯;赵肖东;;基于cPCI总线的高速数据光纤传输系统的实现[J];微计算机信息;2006年32期

7 毛海岑,江浩洋,石岩,张天序;一种板间高速通信方式LINK口的设计与实现[J];微电子学与计算机;2004年03期

8 金山,薛一波;高速传输设备关键技术简介[J];现代有线传输;2000年04期

相关硕士学位论文 前2条

1 伍作文;网络化的嵌入式系统通信机制分析及改进[D];湖南大学;2003年

2 王明芳;基于CPCI总线的高速数据光纤传输系统研究[D];中国科学院研究生院(电子学研究所);2006年



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