基于FPGA的高速宽带数据处理
发布时间：2018-08-19 05:55
【摘要】：随着信息产业的快速发展,通信、电子、多媒体等行业对数据传输的速度以及带宽的需求不断增加。如何实现可靠、高速的宽带数据传输已经成为一个热门课题。基于以上背景,本课题设计了一款基于PCI Express总线的高速宽带数据传输与处理方案,从而实现了数据实时、高速地从计算机传入目标板并进行数据处理的过程,并且通过一系列实验设计,对PCI Express总线性能进行验证。 本课题简述了PCI Express总线协议、总线架构以及传输方式。在此基础上,从逻辑设计、软件设计两个方面详细阐述了一种实现高速宽带数据传输与处理的方案。在逻辑方面,重点阐述了基于Altera Cyclone IV GX系列开发板的PCI Express,总线设计方案,详细描述了利用Altera Hard IP实现PCI Express传输层、数据链路层、物理层的设计过程。PCI Express应用层设计是本文的技术重点。本课题在已有Altera Hard IP设计基础上,在PCI Express应用层实现了FFT设计并且将已有链路进行划分,逐步测试了PCI Express链路的性能,从而实现了高速宽带数据的传输与处理。软件部分,本课题采用功能强大、开发周期较短的WinDriver进行PCI Express驱动程序设计,主要阐述了利用WinDriver开发设备驱动的优势与开发设计流程,针对关键API函数进行了详细描述。在此基础上,本课题给出了利用MSVisual C++6.0开发环境设计PC端应用程序方案。在本论文结论部分给出了总体设计所达到的传输性能以及各个设计的测试结果。 本文提出的设计通过模块级和系统级的功能仿真以及性能测试,能够稳定的运行。结果表明,本课题设计可以满足高速宽带数据传输以及处理的要求。
[Abstract]:With the rapid development of information industry, communication, electronics, multimedia and other industries of data transmission speed and bandwidth requirements are increasing. How to achieve reliable, high-speed broadband data transmission has become a hot topic. Based on the above background, this paper designs a high-speed broadband data transmission and processing scheme based on PCI Express bus, which realizes the process of real-time data transmission and high-speed data processing from the computer to the target board. And through a series of experimental design, the performance of PCI Express bus is verified. This paper describes the PCI Express bus protocol, bus architecture and transmission mode. On this basis, a scheme for high-speed broadband data transmission and processing is described in detail from two aspects: logic design and software design. In the aspect of logic, the design scheme of PCI express and bus based on Altera Cyclone IV GX series development board is expounded, and the realization of PCI Express transport layer and data link layer by using Altera Hard IP is described in detail. The design process of physical layer. PCI Express application layer design is the focus of this paper. Based on the existing Altera Hard IP design, the FFT design is implemented in the PCI Express application layer and the existing links are partitioned. The performance of the PCI Express link is tested step by step, thus the transmission and processing of high-speed broadband data are realized. In the software part, the WinDriver with powerful function and short development period is used to design the PCI Express driver. The advantages and the design flow of using WinDriver to develop the device driver are mainly expounded, and the key API functions are described in detail. On the basis of this, the project of designing PC-side application program using MSVisual C 6. 0 development environment is given. In the last part of the thesis, the transmission performance of the whole design and the test results of each design are given. The design presented in this paper can run stably through function simulation and performance test at module and system level. The results show that the design can meet the requirements of high-speed broadband data transmission and processing.
【学位授予单位】：北京邮电大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP336;TN791
[Abstract]:With the rapid development of information industry, communication, electronics, multimedia and other industries of data transmission speed and bandwidth requirements are increasing. How to achieve reliable, high-speed broadband data transmission has become a hot topic. Based on the above background, this paper designs a high-speed broadband data transmission and processing scheme based on PCI Express bus, which realizes the process of real-time data transmission and high-speed data processing from the computer to the target board. And through a series of experimental design, the performance of PCI Express bus is verified. This paper describes the PCI Express bus protocol, bus architecture and transmission mode. On this basis, a scheme for high-speed broadband data transmission and processing is described in detail from two aspects: logic design and software design. In the aspect of logic, the design scheme of PCI express and bus based on Altera Cyclone IV GX series development board is expounded, and the realization of PCI Express transport layer and data link layer by using Altera Hard IP is described in detail. The design process of physical layer. PCI Express application layer design is the focus of this paper. Based on the existing Altera Hard IP design, the FFT design is implemented in the PCI Express application layer and the existing links are partitioned. The performance of the PCI Express link is tested step by step, thus the transmission and processing of high-speed broadband data are realized. In the software part, the WinDriver with powerful function and short development period is used to design the PCI Express driver. The advantages and the design flow of using WinDriver to develop the device driver are mainly expounded, and the key API functions are described in detail. On the basis of this, the project of designing PC-side application program using MSVisual C 6. 0 development environment is given. In the last part of the thesis, the transmission performance of the whole design and the test results of each design are given. The design presented in this paper can run stably through function simulation and performance test at module and system level. The results show that the design can meet the requirements of high-speed broadband data transmission and processing.
【学位授予单位】：北京邮电大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP336;TN791
【参考文献】
相关期刊论文 前10条
1 魏鹏;罗武胜;杜列波;;PCI Express总线及其应用设计研究[J];电测与仪表;2007年02期
2 焦文U，
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