FMC采集模块通用载板接口控制与数据存储逻辑设计

发布时间：2018-09-09 13:44

【摘要】：随着大规模集成电路、FPGA技术和计算机的快速发展，测试仪器的模块化设计已经成为了一种趋势。为了满足不同的测试需求，利用同一硬件平台完成多个仪器的测试功能日益成为了测试数字化仪系统的研究热点，其中功能模块化、接口控制功能多样化、高速率大容量采样数据存储是实现系统功能的关键。基于FPGA技术的FMC（FPGA Mezzanine Card）接口，借助于FPGA的规模及性能的快速提高，在实时采样系统的硬件扩展应用中，，已成为主流发展方向之一。但与ASIC相比，FPGA本身的安全性比较差。基于SRAM工艺的FPGA配置数据很容易被非法窃取，这将对设计者造成极大的经济损失。因此，保护FPGA设计的知识产权问题日趋严峻。论文针对FMC实时采样系统的特点和应用需求，设计了具有加密功能的接口控制逻辑和带灵活触发机制的高速采样存储逻辑。FMC采集模块通用载板的接口控制逻辑部分完成加密识别技术设计与高速数据流的接收和处理；而数据存储逻辑部分实现基于DDR3SDRAM IP Core的采样存储控制。本文首先完成了一种基于SHA-1算法的加密认证方式，以达到保护FPGA逻辑设计的目的；接着设计完成了基于DDR3SDRAM技术的高速采样存储控制器，它以提高采样系统信号的捕获和定时分辨能力为目标，凸显高速实时采样系统中高速率、大容量以及快速触发等特征；文中最后对设计内容进行了验证，并给出了接口控制逻辑和高速采样存储控制器运用于FMC数据采集模块（FMC5212、FMC4214）的全性能测试结果。高速采样存储控制器能够对四片DDR3SDRAM进行并行触发存储，完全满足系统最高采样速率的存储要求。加密认证功能有效保护FPGA逻辑设计的知识产权，具有很好的推广意义，最终将代码打包以逻辑产品的形式发布。
[Abstract]:With the rapid development of large scale integrated circuit (LSI) FPGA technology and computer, modular design of test instruments has become a trend. In order to meet the different testing requirements, using the same hardware platform to complete the testing function of multiple instruments has become the research hotspot of the test digitizer system day by day, in which the function modularization, the interface control function is diversified, High speed and large capacity data storage is the key to realize the function of the system. The FMC (FPGA Mezzanine Card) interface based on FPGA technology, with the help of the rapid improvement of the scale and performance of FPGA, has become one of the mainstream development directions in the hardware extension application of real-time sampling system. But compared with ASIC, the security of ASIC itself is poor. FPGA configuration data based on SRAM process is easy to be stolen illegally, which will cause great economic loss to designers. Therefore, the protection of intellectual property rights of FPGA design is becoming more and more serious. This paper aims at the characteristics and application requirements of FMC real-time sampling system. The interface control logic with encryption function and high-speed sampling storage logic with flexible trigger mechanism. FMC acquisition module. The interface control logic of the universal carrier board completes the design of encryption identification technology and the reception and processing of high speed data flow. The data storage logic part realizes the sampling storage control based on DDR3SDRAM IP Core. In this paper, a encryption authentication method based on SHA-1 algorithm is first implemented to protect FPGA logic design, and then a high-speed sampling storage controller based on DDR3SDRAM technology is designed. It aims at improving the signal acquisition and timing resolution of the sampling system, and highlights the characteristics of high speed, large capacity and fast trigger in the high speed real-time sampling system. The full performance test results of interface control logic and high speed sampling memory controller applied to FMC data acquisition module (FMC5212,FMC4214) are also given. The high-speed sampling memory controller can trigger the memory of four pieces of DDR3SDRAM in parallel, which fully meets the storage requirement of the highest sampling rate of the system. The encryption authentication function effectively protects the intellectual property of FPGA logic design, and has good promotion significance. Finally, the code is packaged and released in the form of logic products.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP334.7;TP333

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