一种OTP存储器读出系统的设计技术研究

发布时间：2018-12-14 23:22

【摘要】：OTP存储器是一种一次可编程的只读存储器,具有可靠性高、稳定性高、保密性强、存储单元面积小等特点。因此OTP存储器在保密性要求高、稳定性要求高、只需一次编程等场合,应用非常广泛。例如应用在RFID、密钥存储芯片、以及卫星、火箭、航天飞机、太空飞船、国际空间站等环境复杂,干扰强的地方。这方面的器件在我国几乎完全依赖进口,但是发达国家对相关技术和产品对我实施禁运禁售,限制了我国军事、工业等领域的发展。所以对这方面集成电路的研究有助于我国集成电路的发展。本文的目的是设计一款适用于OTP存储器的读出系统,包括与读取操作相关的所有电路和模块,如译码器、控制电路、灵敏放大器、锁存电路、双向数据端口等模块。文章的前两章介绍了OTP存储器的国内外研究现状,OTP存储器的结构以及OTP单元用作存储单元的原理；然后第三章详细阐述了OTP存储器读出系统的设计和仿真,包括译码器、地址检测电路、控制信号产生电路、灵敏放大器、两级锁存电路、双向数据端口等子模块的电路设计及仿真结果；接下来第四章详细介绍了芯片的版图设计、寄生参数提取,并用FineSim对芯片进行了版图后仿真.最后,介绍了芯片的测试平台、测试方法以及测试过程,并对芯片读出系统的功能和速度进行了测试,测试结果表明读出系统工作正常,达到了电路的设计指标。本文所设计的OTP存储器读出系统具有一定的通用性和可移植性,应用广泛。虽基于16Kbit OTP存储器,但并不局限于此,同样可以用在512Kbit、1Mbit甚至容量更大的OTP存储器芯片中,需要改变的只是小部分电路,整个读出系统可以很容易的嵌入进去,实现稳定准确的读取操作。
[Abstract]:OTP memory is a kind of single programmable read-only memory, which has the characteristics of high reliability, high stability, strong confidentiality and small storage cell area. Therefore, OTP memory is widely used in many applications, such as high security, high stability and only one programming. For example, applications in RFID, key storage chips, as well as satellites, rockets, space shuttles, spaceships, international space stations and other complex environments, strong interference. The devices in this field almost rely on imports in China, but the developed countries have imposed embargo on the related technology and products, which has restricted the development of military, industrial and other fields in our country. So the research of integrated circuit in this field is helpful to the development of integrated circuit in our country. The purpose of this paper is to design a readout system suitable for OTP memory, including all circuits and modules related to read operation, such as decoder, control circuit, sensitive amplifier, latch circuit, bidirectional data port and so on. The first two chapters of this paper introduce the research status of OTP memory at home and abroad, the structure of OTP memory and the principle of OTP unit as memory cell. Then the third chapter describes the design and simulation of OTP memory readout system, including decoder, address detection circuit, control signal generation circuit, sensitive amplifier, two-stage latch circuit. The circuit design and simulation results of the bidirectional data port isobaric module; In the fourth chapter, the layout design and parasitic parameter extraction of the chip are introduced in detail, and the post-layout simulation of the chip is carried out with FineSim. Finally, the test platform, test method and test process of the chip are introduced. The function and speed of the chip readout system are tested. The test results show that the readout system works normally and achieves the design target of the circuit. The OTP memory readout system designed in this paper has certain generality and portability, and is widely used. Although it is based on 16Kbit OTP memory, but it is not limited to this, it can also be used in 512kbit bit 1Mbit or larger OTP memory chip. Only a small part of the circuit needs to be changed, so the whole readout system can be easily embedded. To achieve stable and accurate read operation.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP333

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