高速通信接口的设计与实现
发布时间：2019-02-19 20:27
【摘要】：随着网络通信和计算机科学技术的迅猛发展，在各个信息科学领域对于I/O总线的性能要求也越来越高，传统的I/O总线已逐渐满足不了现有的需求，于是PCI Express作为第三代I/O互连总线的代表受到了广泛的关注，它兼备了高性能、高扩展性、高可靠性以及低成本等特点，广泛应用于移动通讯、航天航空、工业自动化控制等领域。 本文首先介绍了I/O总线的发展历程以及国内外研究现状，，并着重提出了PCIExpress总线的技术优势，然后阐述了PCI Express总线的协议规范、拓扑结构、设备层次、事务机制以及错误处理方式，并以此为理论基础经过论证比较提出了基于FPGA的PCI Express接口设计方案，从模块设计、功能仿真、逻辑优化、驱动开发和应用程序开发五个方面做了详细的介绍，最后对系统的单次读写、DMA读写、DMA读写速度进行了完整的测试和验证，结果表明所设计的PCIExpress接口达到了设计要求，兼备了较高的性能和速度。
[Abstract]:With the rapid development of network communication and computer science and technology, the performance requirements of I / O bus are becoming higher and higher in all fields of information science. The traditional I / O bus has been unable to meet the existing needs. Therefore, PCI Express, as the representative of the third generation I / O interconnection bus, has received extensive attention. It has the characteristics of high performance, high expansibility, high reliability and low cost, so it is widely used in mobile communication, aerospace, and so on. Industrial automation control and other fields. This paper first introduces the development of I / O bus and the current research situation at home and abroad, and puts forward the technical advantages of PCIExpress bus, and then expounds the protocol specification, topology structure, device level of PCI Express bus. The transaction mechanism and error handling method are discussed and compared with each other on the basis of theory. The design scheme of PCI Express interface based on FPGA is put forward, which includes module design, function simulation, logic optimization, and so on. Five aspects of driver development and application development are introduced in detail. Finally, the system single read and write, DMA read and write speed are tested and verified. The results show that the designed PCIExpress interface meets the design requirements. It also has high performance and speed.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP336
本文编号：2426847
[Abstract]:With the rapid development of network communication and computer science and technology, the performance requirements of I / O bus are becoming higher and higher in all fields of information science. The traditional I / O bus has been unable to meet the existing needs. Therefore, PCI Express, as the representative of the third generation I / O interconnection bus, has received extensive attention. It has the characteristics of high performance, high expansibility, high reliability and low cost, so it is widely used in mobile communication, aerospace, and so on. Industrial automation control and other fields. This paper first introduces the development of I / O bus and the current research situation at home and abroad, and puts forward the technical advantages of PCIExpress bus, and then expounds the protocol specification, topology structure, device level of PCI Express bus. The transaction mechanism and error handling method are discussed and compared with each other on the basis of theory. The design scheme of PCI Express interface based on FPGA is put forward, which includes module design, function simulation, logic optimization, and so on. Five aspects of driver development and application development are introduced in detail. Finally, the system single read and write, DMA read and write speed are tested and verified. The results show that the designed PCIExpress interface meets the design requirements. It also has high performance and speed.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP336
【参考文献】
相关期刊论文 前5条
1 徐君明,裴先登,王海卫,黄浩;高性能计算机I/O技术PCI Express分析[J];计算机工程;2004年12期
2 孟会;刘雪峰;;PCI Express总线技术分析[J];计算机工程;2006年23期
3 许军;李玉山;贺占庄;许西荣;;PCI-Express总线技术研究[J];计算机工程与科学;2006年05期
4 陈乃塘;;PCI Express的前世与今生——接口演化史[J];电子测试;2003年10期
5 林锦棠;敖发良;;PCI Express研究及基于FPGA的实现[J];微计算机信息;2008年29期
相关硕士学位论文 前3条
1 万毅;存储区域网络中FC加密卡的设计与实现[D];电子科技大学;2009年
2 任连芳;基于PCI Express总线的数据传输与存储[D];南京理工大学;2010年
3 张亮;PCI Express协议的实现与验证[D];西安电子科技大学;2012年
本文编号：2426847
本文链接：https://www.wllwen.com/kejilunwen/jisuanjikexuelunwen/2426847.html
