高速串行闪存通用驱动程序设计

发布时间：2019-04-18 12:00

【摘要】：本文主要研究了高速串行闪存芯片的工作原理,并为这种芯片设计了一套可应用于实时嵌入式系统的通用设备驱动程序。高速串行闪存是基于NOR型结构闪存技术(简称NORFlash技术)并使用扩展型串行接口的非易失性存储芯片。该种闪存可以运行的时钟频率高达百兆赫兹,具有四比特数据位宽,最少仅8根管脚。其生产采用了40纳米至60纳米左右的先进工艺,这使得此类闪存最小封装尺寸仅为8×6mm。所以,高速串行闪存兼具高性能和低成本的优点。传统的基于NORFlash技术的串行闪存遵循标准的SPI协议,仅具有一比特数据位宽,并且可运行的最高时钟频率偏低。而传统的并行闪存(本文特指基于NORFlash技术)虽然数据位宽较高,但是其生产成本较高,而且由于物理限制,其性能也很难再提高。高速串行闪存遵循一种新型的扩展型SPI协议,数据位宽是传统串行闪存的四倍,且大幅提高了可运行的最高时钟频率,其性能远优于传统串行闪存。在一个拥有大容量高速缓存(Cache)的嵌入式系统中,使用这种高速串行闪存和使用并行闪存的效果不相上下。高速串行闪存不仅继承了传统串行闪存的低成本优势,还能在性能上媲美并行闪存,所以有较大的竞争优势来取代传统串行闪存和传统并行闪存。高速串行闪存与传统并行闪存的存储原理类似,但二者的控制方式及操作指令完全不同,因此高速串行闪存无法使用传统并行闪存的驱动程序。另一方面,高速串行闪存扩展了传统串行闪存的传输协议,因此高速串行闪存也不能使用传统串行闪存的驱动程序。本文深入分析了高速串行闪存芯片工作原理和控制方式,并详细的描述了设计高速串行闪存通用驱动程序的思路和方法。该高速串行闪存驱动程序不仅能广泛兼容多种主流规格的商用高速串行闪存,还能保持不同型号高速串行闪存各自的独有优势。在工程应用中,该驱动设计的通用性使得软件升级成本趋近于零,因此本论题具有较高的工程应用价值。
[Abstract]:This paper mainly studies the working principle of high-speed serial flash memory chip and designs a universal device driver for this chip which can be used in real-time embedded system. High-speed serial flash memory is a non-volatile memory chip based on NOR structure flash memory technology (abbreviated as NORFlash technology) and using extended serial interface. The flash memory can run at a clock rate of up to 100 megahertz and has a four-bit data bit width with at least 8 pins. It is manufactured in an advanced process ranging from 40 nm to 60 nm, resulting in a minimum package size of 8 脳 6 mm for this type of flash memory. Therefore, high-speed serial flash memory has the advantages of high performance and low cost. The traditional serial flash memory based on NORFlash technology follows the standard SPI protocol, it has only one bit width of data, and the highest clock frequency that can be run is on the low side. However, the traditional parallel flash memory (especially based on NORFlash) has a high bit width, but its production cost is high, and its performance is difficult to improve because of physical limitations. High-speed serial flash memory follows a new extended SPI protocol. The data bit width of high-speed serial flash memory is four times that of traditional serial flash memory, and the performance of high-speed serial flash memory is much better than that of traditional serial flash memory. In an embedded system with a high-capacity cache (Cache), the use of this high-speed serial flash is comparable to the use of parallel flash memory. High-speed serial flash memory not only inherits the low-cost advantage of traditional serial flash memory, but also can match the performance of parallel flash memory, so it has a great competitive advantage to replace the traditional serial flash memory and the traditional parallel flash memory. The storage principle of high-speed serial flash memory is similar to that of traditional parallel flash memory, but their control modes and operating instructions are completely different. Therefore, high-speed serial flash memory can not use the driver of traditional parallel flash memory. On the other hand, high-speed serial flash memory extends the transport protocol of traditional serial flash memory, so high-speed serial flash memory can not use the driver of traditional serial flash memory. In this paper, the working principle and control mode of high-speed serial flash memory chip are deeply analyzed, and the idea and method of designing universal driver for high-speed serial flash memory are described in detail. The high-speed serial flash memory driver can not only be compatible with many mainstream commercial high-speed serial flash memory, but also maintain the unique advantages of different models of high-speed serial flash memory. In engineering applications, the generality of the driver design makes the cost of software upgrade approach to zero, so this paper has high engineering application value.
【学位授予单位】：复旦大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TP333

【共引文献】