基于SIMD结构的高性能DSP处理器评测程序的优化与实现
发布时间：2019-06-07 15:12
【摘要】：随着信息产业的发展，近年来数字信号处理学科发展迅速。DSP处理器在数字通信、信号处理、雷达、电子对抗、图像处理等方面得到了广泛的应用。在DSP快速发展的新形势下，面临处理速度更高，功能更全，功耗更低，存储器用量更少的要求。多通道结构和单指令多重数据（SIMD）、超长指令字结构（VLIM）、超标量结构、超流水结构、多处理、多线程及可并行扩展的超级哈佛结构在高性能处理器将占据主导地位。在DSP开发过程中，，对其性能的评估是一项十分重要的工作。鉴于MIPS这样的传统量度越来越不精确，且DSP应用程序的特征之一是大部分的处理工作集中在程序的一部分（核心程序），因此选取信号处理相关的基准程序来测试评估DSP处理器。 XXX-DSP是一款国产面向终端应用的高性能、低功耗、具有自主知识产权的嵌入式DSP IP的多内核处理器，本文通过验证基准评测程序的运行情况，评估XXX-DSP的运算性能，论文主要论述了以下内容： 首先简要介绍了XXX-DSP以及SIMD技术的发展状况，针对XXX-DSP大致介绍了其系统架构并对其内核各个功能模块作了简要分析； 论文重点对核心基准程序算法进行定点仿真，并根据该DSP特有的SIMD指令集对程序算法进行优化，最终在板级验证平台上运行，验证了其加速优势。 通过本文中的仿真验证及比较分析，完成了对该DSP的功能性验证，证实了其SIMD结构的加速效果，并对板级仿真结果进行了详细分析，最终完成了对该DSP的测试任务。
[Abstract]:With the development of information industry, the subject of digital signal processing has developed rapidly in recent years. DSP processor has been widely used in digital communication, signal processing, radar, electronic countermeasures, image processing and so on. Under the new situation of rapid development of DSP, it is faced with the requirements of higher processing speed, more complete function, lower power consumption and less memory consumption. Multi-channel structure and single instruction multi-data (SIMD), super-long instruction word structure (VLIM), superscalar structure, super pipeline structure, multi-processing, multi-thread and parallel extensible super Harvard structure will dominate the high performance processor. In the process of DSP development, the evaluation of its performance is a very important work. In view of the fact that traditional metrics such as MIPS are becoming more and more inaccurate, and one of the characteristics of DSP applications is that most of the processing is focused on part of the program (core programs), Therefore, the reference program related to signal processing is selected to test and evaluate the DSP processor. XXX-DSP is a domestic embedded DSP IP multi-core processor with high performance, low power consumption and independent intellectual property rights for terminal applications. This paper evaluates the operation performance of XXX-DSP by verifying the operation of the benchmark evaluation program. This paper mainly discusses the following contents: firstly, the development of XXX-DSP and SIMD technology is briefly introduced, its system architecture is briefly introduced for XXX-DSP, and each functional module of its kernel is briefly analyzed. This paper focuses on the fixed-point simulation of the core benchmark program algorithm, and optimizes the program algorithm according to the DSP unique SIMD instruction set, and finally runs on the board-level verification platform to verify its acceleration advantage. Through the simulation verification and comparative analysis in this paper, the functional verification of the DSP is completed, the acceleration effect of the SIMD structure is verified, and the board level simulation results are analyzed in detail. Finally, the test task of the DSP is completed.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP368.1
本文编号：2494888
[Abstract]:With the development of information industry, the subject of digital signal processing has developed rapidly in recent years. DSP processor has been widely used in digital communication, signal processing, radar, electronic countermeasures, image processing and so on. Under the new situation of rapid development of DSP, it is faced with the requirements of higher processing speed, more complete function, lower power consumption and less memory consumption. Multi-channel structure and single instruction multi-data (SIMD), super-long instruction word structure (VLIM), superscalar structure, super pipeline structure, multi-processing, multi-thread and parallel extensible super Harvard structure will dominate the high performance processor. In the process of DSP development, the evaluation of its performance is a very important work. In view of the fact that traditional metrics such as MIPS are becoming more and more inaccurate, and one of the characteristics of DSP applications is that most of the processing is focused on part of the program (core programs), Therefore, the reference program related to signal processing is selected to test and evaluate the DSP processor. XXX-DSP is a domestic embedded DSP IP multi-core processor with high performance, low power consumption and independent intellectual property rights for terminal applications. This paper evaluates the operation performance of XXX-DSP by verifying the operation of the benchmark evaluation program. This paper mainly discusses the following contents: firstly, the development of XXX-DSP and SIMD technology is briefly introduced, its system architecture is briefly introduced for XXX-DSP, and each functional module of its kernel is briefly analyzed. This paper focuses on the fixed-point simulation of the core benchmark program algorithm, and optimizes the program algorithm according to the DSP unique SIMD instruction set, and finally runs on the board-level verification platform to verify its acceleration advantage. Through the simulation verification and comparative analysis in this paper, the functional verification of the DSP is completed, the acceleration effect of the SIMD structure is verified, and the board level simulation results are analyzed in detail. Finally, the test task of the DSP is completed.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2012
【分类号】：TP368.1
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相关期刊论文 前2条
1 高鹰,谢胜利;一种变步长LMS自适应滤波算法及分析[J];电子学报;2001年08期
2 赵顺珍;马英;;基于DSP的FIR数字滤波器设计与实现[J];微计算机信息;2009年05期
本文编号：2494888
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