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基于FPGA的JPEG压缩编码器的设计与实现

发布时间:2018-02-01 08:36

  本文关键词: 图像压缩 FPGA JPEG 出处:《中北大学》2017年硕士论文 论文类型:学位论文


【摘要】:随着数码相机等电子产品渗透在人类生活的方方面面,以及图像技术在航天、通讯、生物医学等领域的不断应用,这些广大的需求刺激着图像压缩技术的发展。从JPEG压缩到JPEG2000,再到JPEG XR,科研工作者对图像压缩的研究从未停止脚步。虽然JPEG2000和JPEG XR在某些性能方面优于JPEG压缩技术,但事实上,JPEG压缩仍然是事实上的主流技术。同时,鉴于FPGA的快速发展与广泛应用,它丰富的资源优势及它强大的并行优势越来越受到人们的青睐,因此,在很多对速度和实时性要求较高的应用中,科研人员更趋向用FPGA来实现图像压缩。鉴于JPEG压缩在各领域的应用多是灰度图像,因此本文实现的JPEG压缩器是针对灰度图像进行设计的。本文首先介绍了图像压缩的研究背景与意义以及目前JPEG压缩的发展现状,然后给出了JPEG编码器在FPGA中实现的设计方案,并对本设计采用的JPEG压缩基本系统的流程进行了详尽的介绍。其次,又针对JPEG压缩中重要的算法DCT变换和量化给出了新的实现方式,并用MATLAB对其做了仿真验证。接着按模块化的思想一一介绍了各个模块在FPGA中的设计实现,最后给出了各模块的测试验证。本设计采用Altera公司Cyclone III系列的芯片,在QuartusII 13.0的开发环境下完成设计。对二维DCT变换模块,采用了类陈氏算法,充分利用FPGA的并行性和乘法器资源,实现了快速、稳定的DCT变换。量化模块创新的实现了可在FPGA中进行9级不同量化表的选择,以查找表的方式实现了DC/AC系数的熵编码。并先后对各个模块进行了功能测试,将图像源数据做成MIF文件进行测试,并用第三方软件解码,最后证明能够显示完整的图片。测试结果表明,该JPEG编码器实现了预期的功能,达到设计目标。
[Abstract]:With the penetration of digital cameras and other electronic products in all aspects of human life, as well as image technology in aerospace, communications, biomedical and other fields of continuous application. These vast demands stimulate the development of image compression technology, from JPEG compression to JPEG2000 to JPEG XR. Researchers have never stopped studying image compression. Although JPEG2000 and JPEG XR are better than JPEG compression in some aspects, in fact. JPEG compression is still the mainstream technology in fact. At the same time, due to the rapid development and wide application of FPGA, its rich resource advantages and its powerful parallel advantages are more and more popular. In many applications which require high speed and real-time, researchers tend to use FPGA to achieve image compression. In view of the application of JPEG compression in various fields, most of them are gray images. Therefore, the JPEG compressor realized in this paper is designed for grayscale image. Firstly, this paper introduces the research background and significance of image compression and the current development of JPEG compression. Then the design scheme of JPEG encoder in FPGA is given, and the flow of the basic JPEG compression system used in this design is introduced in detail. Secondly. A new implementation method of DCT transform and quantization, which is an important algorithm in JPEG compression, is also presented. Then the design and implementation of each module in FPGA are introduced one by one according to the idea of modularization. Finally, the test verification of each module is given. This design adopts the Cyclone III series chip of Altera company. In the development environment of QuartusII 13.0, the design is completed. For the two-dimensional DCT transform module, Chen's algorithm is used to make full use of the parallelism of FPGA and multiplier resources. A fast and stable DCT transformation is realized. The quantization module innovates to select 9 different quantization tables in FPGA. The entropy encoding of DC/AC coefficient is realized by lookup table, and the function of each module is tested successively. The image source data is made into MIF file and decoded by the third party software. The test results show that the JPEG encoder achieves the desired function and achieves the design goal.
【学位授予单位】:中北大学
【学位级别】:硕士
【学位授予年份】:2017
【分类号】:TP391.41

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