红外焦平面阵列读出电路的研究与设计

发布时间：2018-01-14 07:40

本文关键词：红外焦平面阵列读出电路的研究与设计　出处：《吉林大学》2017年硕士论文　论文类型：学位论文

【摘要】：随着现代科技的发展,红外探测技术已被广泛应用于军事领域,如红外夜视、红外制导、高科技军事作战装备等方面。同时也日益走进人们的生活,比如医疗、汽车应用、红外成像、电子防盗等领域。红外成像系统的成像质量取决于两个关键因素:1)作为光电转换装置的红外焦平面的性能;2)将探测器光生信号转移到处理单元的读出电路。本论文对红外焦平面阵列读出电路进行了研究与设计,并成功设计出一款高动态范围红外焦平面阵列读出电路。本论文主要内容及成果如下:1)本论文所设计的读出电路采用电容跨导放大器结构作为像元接口电路,为实现较大的动态范围而采用多个积分电容。另外,在像元电路中使用相关双采样电路,可以有效去除复位噪声,从而提高读出电路噪声性能。读出电路像元面积为25μm×25μm,阵列大小为320×256。2)为实现高动态范围,本设计在每列放置两条信号处理链路,分别用来处理和读出像元电路产生的高增益信号及低增益信号,可以达到每一帧输出两幅图像,并通过高动态合成算法可以将这两幅图像合成一张高动态范围图像。3)为提高帧频,本设计将读出电路分成四个部分,每部分共用一个模拟输出通道,最终使得读出电路帧频可以达到100帧每秒以上。读出电路偏置均由片上产生,无需片外提供。另外,偏置电路及列级读出电路的增益可以通过片上SPI进行调节。4)本设计采用的是XFAB 180nm 1P4M工艺,整体芯片面积为10mm×10mm,总功耗小于500mW。整体电路使用cadence软件进行设计、仿真及布局布线。
[Abstract]:With the development of modern science and technology, infrared detection technology has been widely used in military fields, such as infrared night vision, infrared guidance, high-tech military combat equipment and so on. The imaging quality of infrared imaging system depends on two key factors: 1) the performance of infrared focal plane used as photoelectric conversion device; 2) transfer the photo-generated signal of the detector to the readout circuit of the processing unit. In this paper, the readout circuit of the infrared focal plane array is studied and designed. A high dynamic range infrared focal plane array readout circuit has been successfully designed. The main contents and results of this thesis are as follows: 1). The readout circuit designed in this paper uses the capacitance transconductance amplifier as the pixel interface circuit. In order to achieve a large dynamic range, several integral capacitors are used. In addition, the resetting noise can be effectively removed by using the correlation double sampling circuit in the pixel circuit. In order to improve the noise performance of the readout circuit, the pixel area of the readout circuit is 25 渭 m 脳 25 渭 m and the array size is 320 脳 256.2). In this design, two signal processing links are placed in each column, which are used to process and read out the high gain signal and the low gain signal generated by the pixel circuit respectively, so that two images can be output in each frame. In order to improve the frame rate, the readout circuit is divided into four parts, each part sharing an analog output channel. Finally, the readout circuit frame frequency can reach more than 100 frames per second. The readout circuit bias is generated from the chip, no need to provide. In addition. The gain of bias circuit and column readout circuit can be adjusted by on-chip SPI. 4) this design adopts XFAB 180nm 1P4M process. The whole chip area is 10mm 脳 10mm, the total power consumption is less than 500mW. The whole circuit is designed, simulated and wired by cadence software.
【学位授予单位】：吉林大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN215

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