一种具有自动放电功能的高速峰值保持电路的设计

发布时间：2018-04-10 15:37

本文选题：峰值保持电路 + 跨导运放　；参考：《吉林大学》2017年硕士论文

【摘要】：峰值保持器,是一种能随着输入信号的值上升而上升,并且能将它的最大值维持一定时间,以便后续电子器件处理的电路。它在能谱检测、激光测量系统、钢水温度测量系统、血压测量等数据采集系统中都有不可或缺的作用。本论文从峰值保持电路的现状出发,说明了研究快速的峰值保持电路的必要性。接下来,全面阐述了峰值保持电路的主要理论,分析了这一电路的基本组成和工作原理。然后,在此基础上,开始峰值保持器的设计。该电路由峰值保持电路模块和放电电路模块组成。其中,峰值保持电路模块是由运算放大器、电压缓冲器、电容器以及二极管等构成;放电电路模块是由电压比较器、单稳态触发器以及开关场效应管构成。在峰值保持电路模块的具体的电路设计中,考虑到输入脉冲脉宽太小,选取了增益为+2的电压缓冲器MAX4278。同时,为了实现电路的宽带宽,选择了带宽很高的跨导运算放大器OPA861。为了提高峰值保持电路的积分非线性和降低电压保持期间的下垂速率,我们选取了反向漏电流较小的Schottky二极管BAT17和绝缘电阻较大的聚苯乙烯电容器,同时在电压缓冲器的前端又增加了一个简单的跟随器。对于放电电路模块的设计,电压比较器为LM361,单稳态触发器为HD74HC123,开关场效应管为2N7000。最后,组成一个保持时间可调的自动放电电路。电路设计完成后,一方面,使用仿真软件验证了其工作性能;另一方面,使用示波器和多道分析仪测试了该电路的实际性能。测试结果表明,该电路的实测性能为:(1)输入范围为:0.2V到3.0V;(2)输入信号最小上升时间为:10ns;(3)下垂速率小于10m V/us;(4)保持误差小于等于10%;(5)积分非线性小于等于0.9%。
[Abstract]:Peak holder is a kind of circuit which can rise with the value of input signal and maintain its maximum value for a certain period of time for subsequent electronic device processing.It plays an indispensable role in energy spectrum measurement, laser measurement system, molten steel temperature measurement system, blood pressure measurement and other data acquisition systems.Based on the current situation of peak-holding circuit, this paper explains the necessity of studying fast peak-holding circuit.Then, the main theory of peak-holding circuit is expounded, and the basic composition and working principle of this circuit are analyzed.Then, on this basis, start the peak holder design.The circuit consists of peak holding circuit module and discharge circuit module.The peak-holding circuit module is composed of an operational amplifier, a voltage buffer, a capacitor and a diode, while the discharge circuit module is composed of a voltage comparator, a Monostable trigger and a switching field effect transistor.In the specific circuit design of peak-holding circuit module, considering that the pulse width of input pulse is too small, the voltage buffer MAX4278with gain of 2 is selected.At the same time, in order to realize the wide bandwidth of the circuit, OPA861, a transconductance operational amplifier with high bandwidth, is selected.In order to improve the integral nonlinearity of peak holding circuit and reduce the sag rate during voltage holding, we select Schottky diode BAT17 with low reverse leakage current and polystyrene capacitor with high insulation resistance.At the same time, a simple follower is added to the front end of the voltage buffer.For the design of discharge circuit module, the voltage comparator is LM361, the Monostable flip-flop is HD74HC123and the switching FET is 2N7000.Finally, an automatic discharge circuit with adjustable holding time is formed.After the circuit design is finished, on the one hand, the performance of the circuit is verified by simulation software; on the other hand, the actual performance of the circuit is tested by oscilloscope and multi-channel analyzer.
【学位授予单位】：吉林大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN702

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