超高频RFID读写器芯片中关键功能电路设计

发布时间：2017-12-28 00:07

本文关键词：超高频RFID读写器芯片中关键功能电路设计　出处：《电子科技大学》2016年硕士论文　论文类型：学位论文

【摘要】：射频识别(radio frequency identification,RFID)技术是通过无线电讯号完成对特定目标的识别和读写,因其独有的优点被应用到多个领域。本文以超高频RFID系统需求为基础,设计实现自主知识产权的适用于860MHz~960MHz频段的UHF RFID读写器CMOS单芯片的数模转换电路和低压差线性稳压电路,设计成果在提高系统性能和系统灵活性上都有重要的价值和广泛的应用前景。研究成果如下:1.本文设计实现的是数模转换器,采用分段式电流舵结构。设计工作包括对数模转化器的原理分析和常见的DAC结构比较,结合UHF RFID的应用需求,用MATLAB工具对分段方式优化;在综合考虑静态参数和动态参数以及面积和功耗等因素后,采用“6+3+3”的分段结构实现。同时研究各类非理想因素引起的误差等对数模转换器性能的影响,指导后续电路设计。2.本文基于TSMC 0.18 um CMOS工艺,在Cadence环境下设计实现“6+3+3”分段式电流舵DAC,包括对各个组成模块的分析、设计、版图绘制和仿真。设计模块有:锁存电路、基准电路、开关阵列、电流镜阵列等部分,采用“工”字型和随机游走完成电流源阵列的布局布线,综合仿真结果为:12位电流舵DAC输入正弦信号频率为320kHz时,采样率为6.5MHz,输出幅度为500mV。DNL=0.13LSB,INL=0.4LSB,SFDR=72.24dB,有效位数为11.8位;满足UHF RFID系统应用需求。3.在研究分析功耗管理模块的基础上,采用TSMC 0.18um CMOS工艺在Cadence环境下设计实现一组低差线性稳压电路。完成系统模块设计和版图设计以及仿真工作。仿真结果表明:带隙基准电路温度系数为6ppm/°C,设计实现增益为58dB,相位裕度为68.8的误差放大电路,完成温度系数小于64ppm/°C,转换效率大于85%的三个LDO电路的仿真分析和设计工作,完成超高频RFID读写器芯片的应用需求的LDO模块设计。综上所述,本文采用理论分析和实际仿真相结合的设计方法,在超高频RFID系统的要求下,主要完成了一种高线性度和高动态范围的分段式电流舵型DAC的设计、一种低温漂高电源抑制比的基准电路设计以及一组低温漂、高精度的低压差线性稳压电路的设计工作。
[Abstract]:Radio frequency identification (RFID) technology is to identify and read specific targets through radio signals, because of its unique advantages, it has been applied to many fields. This paper is based on the demand of RFID system designed for ultra high frequency, realizing independent intellectual property rights in the 860MHz~960MHz band UHF RFID read and write device of CMOS single chip digital to analog conversion circuit and low dropout linear regulator circuit design results have important value and wide application prospect in improving the flexibility of system performance and system. The research results are as follows: 1. the design and implementation of this paper is a digital to analog converter, using a piecewise current steering structure. Comparison of design work including digital analog converter principle and analysis of common DAC structure, combined with the application requirements of UHF RFID, by means of MATLAB mode optimization; considering the static and dynamic parameters and the area and power consumption and other factors, using the "6+3+3" segment structure. At the same time, the influence of the error caused by various non ideal factors on the performance of the logarithmic analog converter is studied, and the follow-up circuit is designed. 2., based on TSMC 0.18 um CMOS process, we design and implement "6+3+3" segmented current steering DAC in Cadence environment, including the analysis, design, layout and Simulation of each module. The design of modules: latch circuit, reference circuit, switch array, current mirror array, the I-shaped and random walk current source array layout, comprehensive simulation results are as follows: 12 the current steering DAC input sinusoidal signal frequency is 320kHz, the sampling rate is 6.5MHz, the output amplitude is 500mV. DNL=0.13LSB, INL=0.4LSB, SFDR=72.24dB, effective number of 11.8 bits; meet the application requirements of UHF RFID system. 3. on the basis of research and analysis of power management module, a group of low differential linear regulator circuits are designed and implemented in Cadence environment by using TSMC 0.18um CMOS technology. Complete system module design and layout design and simulation work. The simulation results show that the band gap reference circuit for temperature coefficient of 6ppm/ ~ C, the design and implementation of a gain of 58dB, phase margin of 68.8 of the error amplifier circuit, temperature coefficient is less than 64ppm/ DEG C, the conversion efficiency greater than 85% of the three LDO circuit simulation analysis and design work, the design of LDO module for UHF RFID reading application demand write device chip. In summary, this design method by theoretical analysis and practical simulation combined, in the UHF RFID system requirements, mainly to complete a high linearity and high dynamic range of the segmented current steering DAC design, low temperature drift and high PSRR reference circuit design and a set of low temperature drift high precision, low dropout linear regulator circuit design.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TP391.44;TN402

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