面向海洋可控源电磁勘探的电磁数据记录仪设计

发布时间:2018-05-14 09:16

  本文选题:可控源 + 数据采集 ; 参考:《中国海洋大学》2014年硕士论文


【摘要】:随着经济的高速发展,人类对地球资源的依赖日益增大。陆上资源已经无法满足经济高速发展的需要。海洋资源因其巨大的经济潜力,越来越被各个国家所重视。尤其是我国对能源的需求逐年攀升。能源危机已影响到了国家的经济稳定和持续发展。研制出具有自主知识产权的电磁数据记录仪系统是提高海底资源勘探能力的重要举措。本文依托国家高技术研究发展计划(863计划)课题“海洋可控源水下系统装备研制和理论研究”和山东省科技发展计划课题“深海电场观测系统关键技术研究”结合项目实际研发过程中的技术积累,以超低噪声、低频斩波放大和高精度、低漂移时钟技术为保障,利用高精度Σ-Δ型A/D转换器和FPGA+ARM技术完成高分辨率、低噪声、低频微弱信号放大的电磁数据记录仪系统的设计。 本文主要围绕数据采集站中的电磁数据记录仪进行研制。电磁数据记录仪主要将电磁场传感器接收回来的信号进行放大处理,然后再利用FPGA技术对多个Σ-Δ型ADC进行同步采集。将采集回来的数据利用FSMC总线传给ARM,利用ARM结合FATFS文件系统将数据存储到CF卡。设计中集成了超低噪声低频斩波放大、可编程放大器、多采样率的24位Σ-Δ型ADC、高可靠性数据存储,并以高精度时钟控制单元对多台采集站之间实现同步采集。利用FPGA为核心的数字设计对采集系统进行采样控制和数据处理,,提高了数据处理速度和精度,同时也优化了整个系统硬件电路设计的规模。 本文从课题的研究意义、国内外研究动态、实现方法和技术等方面入手,对整个系统的设计做了详细的理论分析并完成了软硬件设计。论文主要取得以下研究成果:完成了电磁数据记录仪的硬件原理图设计,并加工成PCB板,完成整个硬件电路的调试;利用Verilog HDL语言完成整个FPGA的控制逻辑设计,通过仿真验证了逻辑功能的正确性;以ARM为平台,完成了所有软件的设计开发和调试。对整个系统进行了联调,在野外做了一系列测试完成了项目提出的性能指标。 系统设计的主要创新性主要体现在:采用基于FPGA的数字逻辑设计方式,在硬件方面降低了电路设计的规模,节约了成本并提高了系统的实时性和可靠性,软件部分也易于仿真和测试;采用高精度的24为Σ-Δ型ADC提高了采集数据的分辨率及动态范围;设计了一套智能电源管理系统,有效降低了系统的功耗;采用时钟标定系统对高精度时钟温度补偿模块进行标定,提高了时钟的精度。
[Abstract]:With the rapid development of economy, human dependence on the earth's resources is increasing. The land resources have been unable to meet the needs of rapid economic development. Because of its huge economic potential, marine resources have been paid more and more attention by various countries, especially in China, the demand for energy has increased year by year. The energy crisis has affected the economic stability of the country. The development of the electromagnetic data recorder with independent intellectual property rights is an important measure to improve the exploration ability of the submarine resources. This paper is based on the national high technology research and development plan (863 plan), "the research and development of marine controlled underwater system equipment and theory" and the project of "deep-sea electricity" in Shandong province. The key technology research of field observation system is combined with the technology accumulation in the process of the project, with ultra low noise, low frequency chopping and high precision, low drift clock technology as the guarantee, and using high precision sigma delta A/D converter and FPGA+ARM technology to complete the electromagnetic data recorder system with high resolution, low noise and low frequency weak signal amplification. Design.
This paper mainly focuses on the development of the electromagnetic data recorder in the data acquisition station. The electromagnetic data recorder mainly amplifies the signals received by the electromagnetic field sensor, and then uses the FPGA technology to synchronize the multiple sigma delta ADC. The collected data is transmitted to ARM by FSMC bus, and the FATFS text is combined with ARM. The system stores the data to the CF card. The design integrates ultra low noise low frequency chopper amplification, programmable amplifier, 24 bit sigma delta ADC with multi sampling rate, high reliability data storage, and synchronous acquisition between multiple acquisition stations with high precision clock control unit. Sampling and control of acquisition system using FPGA as the core digital design Data processing improves the speed and accuracy of data processing, and optimizes the scale of the hardware circuit design of the whole system.
This paper makes a detailed theoretical analysis on the design of the whole system and completes the design of hardware and software in detail from the research significance of the subject, the research trends at home and abroad, the realization method and technology. The paper mainly obtains the following research results: the design of the hardware schematic of the electromagnetic data recorder is completed, and the PCB board is processed to complete the whole hard work. The circuit is debugged; the whole FPGA control logic design is completed using Verilog HDL language. The correctness of the logic function is verified by simulation. The design, development and debugging of all software are completed on the platform of ARM. The whole system is adjusted, and a series of tests in the field have completed the performance index of the project.
The main innovation of the system design is: using the digital logic design method based on FPGA, reducing the scale of the circuit design in the hardware, saving the cost and improving the real-time and reliability of the system. The software part is also easy to simulate and test, and the high precision of 24 is the sigma delta ADC to improve the resolution of the data. A set of intelligent power management system is designed to effectively reduce the power consumption of the system, and the clock calibration system is used to calibrate the high precision clock temperature compensation module, and the precision of the clock is improved.

【学位授予单位】:中国海洋大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:P631.325

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