基于SRAM型FPGA的数字系统容错机制研究

发布时间：2018-04-01 19:16

本文选题：容错　切入点：自修复　出处：《南京航空航天大学》2016年硕士论文

【摘要】：空天应用中基于SRAM型现场可编程门阵列(Field Programmable Gate Array,FPGA)的电子系统易因辐射诱发各种软故障和硬故障,故为保证任务的顺利完成,系统必须具有较强的容错能力。目前大部分系统容错的研究工作侧重于处理某一类故障,能同时处理软故障和硬故障的研究成果较少。本文将三模冗余(Triple Modular Redundancy,TMR)、部分配置刷新和演化硬件(Evolvable Hardware,EHW)思想相结合,设计具有在线自修复能力的单芯片强容错数字系统结构和故障修复机制,对软故障和硬故障均有较好的处理能力。本文主要研究内容如下:(1)分析了空天应用环境下SRAM型FPGA常见的故障类型,并通过分析目前FPGA常用容错技术的优缺点确定了本文的技术方案。介绍了Xilinx Virtex-6 ML605开发套件及其软件开发环境概况。(2)将动态部分重构(Dynamic Partial Reconfiguration,DPR)技术和配置刷新技术相结合,设计了基于部分配置刷新的自主修复系统,包括功能单元的预设计、片上可编程系统硬件平台搭建、系统软件设计、DPR设计、可配置刷新IP核定制。并通过实验验证了部分配置刷新技术对软故障处理的有效性。(3)设计了基于虚拟可重构电路(Virtual Reconfigurable Circuit,VRC)的自演化修复系统,包括VRC电路设计、可演化IP核定制和添加、系统硬件平台搭建、系统软件设计。并以2位乘法器为例在ML605开发套件对自演化修复系统进行了验证。(4)设计了基于SRAM型FPGA的容错系统总体结构,给出了系统的故障修复机制。设计了系统软件,包括软件整体架构、软故障的部分配置刷新修复控制、硬故障的演化修复控制。在ML605开发套件上,分别以2位乘法器和Sobel边缘检测器的设计和实现为例,通过模拟故障注入的方式,验证了系统结构和故障修复机制。其中软故障均使用配置刷新技术修复,2位乘法器和Sobel边缘检测器的硬故障分别使用门级演化和函数级演化方式修复。实验结果表明,本文系统对两类故障均具有较好的处理能力。
[Abstract]:The electronic system based on SRAM Field Programmable Gate FPGA in space-space application is prone to various soft and hard faults caused by radiation, so to ensure the smooth completion of the task, Systems must have a strong fault tolerance capability. At present, most of the research work on fault tolerance in systems is focused on dealing with certain types of faults. There are few research results that can deal with both soft and hard faults. In this paper, the idea of triple Modular redundancy, partial configuration refresh and Evolvable hardware EHW are combined. A single chip strong fault-tolerant digital system structure and fault repair mechanism with on-line self-repair capability are designed. The main contents of this paper are as follows: (1) the common fault types of SRAM type FPGA in space-space application environment are analyzed. By analyzing the advantages and disadvantages of the common fault-tolerant technologies in FPGA, this paper determines the technical scheme of this paper, and introduces the Xilinx Virtex-6 ML605 development suite and its software development environment, which combines the dynamic Partial Reconfiguration with the configuration refresh technology. A self-repairing system based on partial configuration refresh is designed, including pre-design of function unit, hardware platform of on-chip programmable system, system software design and DPR design. The validity of partial configuration refresh technology for soft fault processing is verified by experiments. A self-evolving repair system based on virtual reconfigurable circuit virtual Reconfigurable circuit is designed, including the design of VRC circuit. The architecture of fault-tolerant system based on SRAM type FPGA is designed with the example of 2-bit multiplier in ML605 development suite to verify the self-evolution repair system. This paper presents the fault repair mechanism of the system, designs the system software, including the whole software architecture, the soft fault partial configuration refresh repair control, the hard fault evolution repair control. Taking the design and implementation of 2-bit multiplier and Sobel edge detector as examples, the fault injection is simulated. The system structure and fault repair mechanism are verified, in which soft faults are repaired by configuration refresh technique for 2-bit multiplier and Sobel edge detector by gate level evolution and function level evolution respectively. The experimental results show that, The system has better ability to deal with both kinds of faults.
【学位授予单位】：南京航空航天大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：V446

【参考文献】