星载电子设备背板总线设计及实现
发布时间:2018-05-03 14:06
本文选题:星载测控设备 + 背板总线 ; 参考:《西安电子科技大学》2013年硕士论文
【摘要】:随着卫星电子系统的升级,综合模块化系统已经成为卫星电子系统的发展趋势,为了实现星载电子系统中测控设备内部各模块间高效率、高可靠的通信,本论文开发了一种用于卫星测控设备内部的背板总线,该总线不仅具有高可靠性的数据传输功能,而且将数据采集与指令分发功能集成于总线的远程终端中,该测控背板总线的开发将为卫星测控设备提供一种崭新的系统解决方案。 本论文首先在对多种总线调研的基础上,结合星载测控设备的实际工程需求,提出了一种新型星载测控设备背板总线的设计方案,并详细介绍了该背板总线的总线形式、触发方式与拓扑结构等;紧接着在对集成电路开发流程调研的基础上,,完成了背板总线远程测控终端中总线接口与测控专用集成电路的开发,并描述了总线接口与测控专用集成电路的FPGA原型开发过程,详细介绍了每个功能模块的设计;然后设计了总线接口与测控专用集成电路的芯片测试平台,完成对专用集成电路的功能测试;在文章的最后,对本论文所做工作进行总结,并针对本设计不足之处提出改进目标。 测试与实验结果表明:总线接口与测控专用集成电路功能正常,性能基本满足设计需求;星载电子设备背板总线通信功能正常,测得总线上信号波形理想,验证了背板总线的可行性。
[Abstract]:With the upgrading of satellite electronic system, integrated modularization system has become the development trend of satellite electronic system. In order to realize the high efficiency and high reliability communication between the modules of the measurement and control equipment in the spaceborne electronic system, In this paper, a backplane bus is developed for satellite measurement and control equipment. The bus not only has the function of high reliability data transmission, but also integrates the functions of data acquisition and instruction distribution into the remote terminal of the bus. The development of the backplane bus will provide a new system solution for satellite TT & C equipment. Based on the investigation of various kinds of buses and the actual engineering requirements of spaceborne measurement and control equipment, a new design scheme of backplane bus for spaceborne measurement and control equipment is put forward in this paper, and the bus form of the backplane bus is introduced in detail. On the basis of the investigation of the integrated circuit development process, the development of the bus interface and the measurement and control special integrated circuit in the remote measurement and control terminal based on the backplane bus is completed. The FPGA prototype development process of bus interface and measurement and control ASIC is described, and the design of each functional module is introduced in detail, and then the chip test platform of bus interface and measurement and control ASIC is designed. At the end of the paper, the paper summarizes the work done in this paper, and puts forward the improvement goal in view of the shortcomings of the design. The test and experimental results show that the function of bus interface and measurement and control ASIC is normal, the performance basically meets the design requirements, the communication function of backplane bus of spaceborne electronic equipment is normal, and the signal waveform measured on the bus is ideal. The feasibility of backplane bus is verified.
【学位授予单位】:西安电子科技大学
【学位级别】:硕士
【学位授予年份】:2013
【分类号】:TP336
【参考文献】
相关期刊论文 前10条
1 周强;熊华钢;;新一代民机航空电子互连技术发展[J];电光与控制;2009年04期
2 于云华,石寅;数字集成电路故障测试策略和技术的研究进展[J];电路与系统学报;2004年03期
3 王敬美;杨春玲;;基于FPGA和UART的数据采集器设计[J];电子器件;2009年02期
4 程耀瑜,胡潬;高速12位模数转换器AD7892及其在图像采集中的应用[J];国外电子元器件;2000年09期
5 张智杰;AD574在数据采集中的应用[J];国外电子元器件;2003年06期
6 徐文辉;ARINC659总线简介[J];航空电子技术;1999年02期
7 张喜民;魏婷;;ARINC 659背板数据总线应用研究[J];航空计算技术;2011年05期
8 王九龙;;卫星综合电子系统现状和发展建议[J];航天器工程;2007年05期
9 曾毅;崔波;汪洋海;;伽利略导航试验卫星电子系统设计概述[J];航天器工程;2009年01期
10 蒋艳红;;基于FPGA的UART设计与应用[J];计算机工程;2008年21期
相关硕士学位论文 前1条
1 戴舰威;应用于1553B总线协议的控制器IP核的设计研究[D];西安电子科技大学;2008年
本文编号:1838788
本文链接:https://www.wllwen.com/kejilunwen/jisuanjikexuelunwen/1838788.html