北斗二代B1频段弱信号捕获算法研究及其FPGA验证

发布时间：2018-06-20 09:38

本文选题：北斗信号 + 弱信号捕获　；参考：《东南大学》2017年硕士论文

【摘要】：近年来,随着我国北斗卫星系统的不断发展,"北斗二代"系统已经建设完成,具备区域服务能力。我国正在加快建设的北斗全球导航系统,预计到2020年左右完成组网,提供面向全球用户的服务。随着北斗卫星导航系统有关位置服务应用的需求急剧增加,在各种条件下的导航需求都在对导航系统各个方面提出新的要求。在城市里、森林公路或者是在室内,这些环境下导航信号功率会受到多径、穿墙损耗等原因的影响,信号微弱环境下新的导航定位技术越来越受到人们的重视。北斗基带信号处理是北斗接收机中十分重要的一环,捕获与跟踪性能直接决定着整个接收机的整体性能,本文主要针对北斗卫星信号进行弱信号环境下的捕获算法研究及其FPGA实现。本文首先介绍了北斗系统组成及其信号结构与特性,包括导航数据结构、测距码产生原理及其相关特性。其次,介绍了导航接收机的原理和信号捕获的原理,分析并仿真比较了三种传统的捕获算法;并对弱信号环境下捕获算法的改进策略相干积分、非相干积分和差分相干积分进行分析与比较。同时,本文讨论了用于延长数据处理长度的半比特交替法、二倍分组块补零法和全比特法。针对导航电文比特翻转问题,本文研究并设计了反转检测时域并行捕获(TPATD)算法,对算法进行了仿真分析,仿真结果表明该算法能够在虚警概率为10-3时,实现载噪比为28dB/Hz的微弱北斗卫星信号的捕获,且捕获概率不低于0.995。最后,在ISE Design Suite 14.7平台上采用模块划分的方法,利用Verilog语言对反转检测时域并行捕获算法进行了 FPGA实现。针对算法FPGA实现时资源占用不合理的情况,本文提出了改进的实现方案,并利用Xilinx的VC707开发套件进行了板级验证试验。本文所设计的FPGA捕获算法模块能够实现对"北斗二代" B1频带D2信号的捕获功能,可以方便的在芯片上实现,具有较强的实用性和可扩展性。
[Abstract]:In recent years, with the continuous development of Beidou satellite system in China, the "Beidou second generation" system has been built and has regional service capacity. China is speeding up the construction of the Beidou Global Navigation system, which is expected to be completed by 2020 to provide services for global users. With the rapid increase in the requirements of the Beidou Satellite Navigation system for the application of location services, the requirements for navigation under various conditions are putting forward new requirements for all aspects of the navigation system. In cities, forest roads or indoor navigation signal power will be affected by multi-path, wall wear and other reasons. New navigation and positioning technology in weak signal environment has been paid more and more attention. Beidou baseband signal processing is a very important link in the Beidou receiver. The performance of capture and tracking directly determines the overall performance of the whole receiver. In this paper, the acquisition algorithm of Beidou satellite signal in weak signal environment and its FPGA implementation are studied. This paper first introduces the structure of Beidou system and its signal structure and characteristics, including navigation data structure, ranging code generation principle and its related characteristics. Secondly, the principles of navigation receiver and signal acquisition are introduced, and three traditional acquisition algorithms are analyzed and simulated. The incoherent integral and difference coherent integral are analyzed and compared. At the same time, this paper discusses the half-bit alternating method, the two-fold block complement method and the full-bit method for extending the length of data processing. In order to solve the problem of navigation message bit flipping, this paper studies and designs a time domain parallel acquisition TPATD algorithm for reverse detection. The simulation results show that the algorithm can be used when the false alarm probability is 10 ~ (-3). The acquisition of the weak Beidou satellite signal with a carrier to noise ratio of 28 dB / Hz is realized, and the acquisition probability is not less than 0.995. Finally, using the module partition method on ISE Design Suite 14.7 platform, using Verilog language to implement the parallel acquisition algorithm in time domain of reverse detection based on FPGA. In order to solve the problem of unreasonable resource occupation in FPGA implementation, an improved implementation scheme is proposed, and a board level verification test is carried out by using Xilinx VC707 development suite. The FPGA capture algorithm module designed in this paper can capture the "Beidou second generation" B1 band D2 signal, and can be easily implemented on the chip. It has strong practicability and expansibility.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN967.1

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